From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE77BC87FC9 for ; Tue, 29 Jul 2025 09:55:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qWURi0TUvtA25tZ2tQIifA7zlGvoRvKVfQ+ENFKtBEw=; b=2LtovbxH+fFjS5cOalPr6HHmOu OWZcPuCFdlhTYj2gRI+a/hZp+UI8qMhOtlyUy++onOUd9Qwv9hFqOLrllnmNtW+81JOBQeGn53IOq TDrCUdhiMTu3su6tWRn3I634Pc/C6KkftOGnbvRSGMLgjKSbS5o3mVf/SBMTvSMX/2qjrRw8pws+Q sTce1ldbvlWSML8WB5/GWB3RwnEZr8TRzTu2uLA2lyrgZjlhmeyZ88I4wD2gC8sZD96oHA2S2Qp+W LoVrBALtBSKi67VyodLmtjPLJwJkKkgeeYHKzWCexJmVmIuK/rAjCnxXdMGjWz6wZk08T+213i17/ kjveMHow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1ugh32-0000000GS7J-3CD8; Tue, 29 Jul 2025 09:55:04 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uggjx-0000000GPBD-1sRH; Tue, 29 Jul 2025 09:35:22 +0000 X-UUID: 54e267306c5f11f09f706fa2197c6ceb-20250729 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qWURi0TUvtA25tZ2tQIifA7zlGvoRvKVfQ+ENFKtBEw=; b=WiwWDQFdymCj59eKXJbYqMbqfrAbt2/7PJ6+tf81scbuQyg0344F1FrKiczAEU/3L9PnfVVCFhY+wXxQ9nfk66fFLvg3gO19x9YdxasKU55z2BPRdBaZZoPyaudFAe6W1XZPclLSlGwwEChl/oyOcxadiFsPpjpCsf1Kxgy2q1c=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.2,REQID:a9186071-988b-49e4-9411-d41af5a5474b,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:9eb4ff7,CLOUDID:f2bfe508-aadc-4681-92d7-012627504691,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0|15|50,EDM :-3,IP:nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0 ,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 54e267306c5f11f09f706fa2197c6ceb-20250729 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 683294177; Tue, 29 Jul 2025 02:35:15 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Tue, 29 Jul 2025 17:35:10 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Tue, 29 Jul 2025 17:35:10 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Catalin Marinas , Will Deacon , Sean Wang , , , , CC: Bear Wang , Pablo Sun , Ramax Lo , Macpaul Lin , Macpaul Lin , MediaTek Chromebook Upstream , Krzysztof Kozlowski Subject: [PATCH v3 2/4] arm64: dts: mediatek: mt8395-genio-1200-evk: Move common parts to dtsi Date: Tue, 29 Jul 2025 17:34:59 +0800 Message-ID: <20250729093506.273337-2-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250729093506.273337-1-macpaul.lin@mediatek.com> References: <20250729093506.273337-1-macpaul.lin@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250729_023521_522067_97BEE77F X-CRM114-Status: GOOD ( 12.42 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org In preparation for introducing the Genio 1200 EVK UFS board support, split mt8395-genio-1200-evk.dts file in two to create mt8395-genio-common.dtsi file, containing common definitions for both boards. Signed-off-by: Macpaul Lin Reviewed-by: Krzysztof Kozlowski --- .../dts/mediatek/mt8395-genio-1200-evk.dts | 1189 +---------------- ...-1200-evk.dts => mt8395-genio-common.dtsi} | 4 - 2 files changed, 1 insertion(+), 1192 deletions(-) copy arch/arm64/boot/dts/mediatek/{mt8395-genio-1200-evk.dts => mt8395-genio-common.dtsi} (99%) Changes for v2: - Use git format-patch -C to generate a reviewable patch. Changes for v3: - No change. diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts index cf8cd37f5708..68455f28c246 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts @@ -6,1197 +6,10 @@ */ /dts-v1/; -#include "mt8195.dtsi" -#include "mt6359.dtsi" -#include -#include -#include -#include -#include -#include -#include +#include "mt8395-genio-common.dtsi" / { model = "MediaTek Genio 1200 EVK-P1V2-EMMC"; compatible = "mediatek,mt8395-evk", "mediatek,mt8395", "mediatek,mt8195"; - - aliases { - serial0 = &uart0; - ethernet0 = ð - }; - - chosen { - stdout-path = "serial0:921600n8"; - }; - - firmware { - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0x2 0x00000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - /* - * 12 MiB reserved for OP-TEE (BL32) - * +-----------------------+ 0x43e0_0000 - * | SHMEM 2MiB | - * +-----------------------+ 0x43c0_0000 - * | | TA_RAM 8MiB | - * + TZDRAM +--------------+ 0x4340_0000 - * | | TEE_RAM 2MiB | - * +-----------------------+ 0x4320_0000 - */ - optee_reserved: optee@43200000 { - no-map; - reg = <0 0x43200000 0 0x00c00000>; - }; - - scp_mem: memory@50000000 { - compatible = "shared-dma-pool"; - reg = <0 0x50000000 0 0x2900000>; - no-map; - }; - - vpu_mem: memory@53000000 { - compatible = "shared-dma-pool"; - reg = <0 0x53000000 0 0x1400000>; /* 20 MB */ - }; - - /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ - bl31_secmon_mem: memory@54600000 { - no-map; - reg = <0 0x54600000 0x0 0x200000>; - }; - - adsp_mem: memory@60000000 { - compatible = "shared-dma-pool"; - reg = <0 0x60000000 0 0xf00000>; - no-map; - }; - - afe_dma_mem: memory@60f00000 { - compatible = "shared-dma-pool"; - reg = <0 0x60f00000 0 0x100000>; - no-map; - }; - - adsp_dma_mem: memory@61000000 { - compatible = "shared-dma-pool"; - reg = <0 0x61000000 0 0x100000>; - no-map; - }; - - apu_mem: memory@62000000 { - compatible = "shared-dma-pool"; - reg = <0 0x62000000 0 0x1400000>; /* 20 MB */ - }; - }; - - backlight_lcm0: backlight-lcm0 { - compatible = "pwm-backlight"; - brightness-levels = <0 1023>; - default-brightness-level = <576>; - num-interpolated-steps = <1023>; - pwms = <&disp_pwm0 0 500000>; - }; - - backlight_lcd1: backlight-lcd1 { - compatible = "pwm-backlight"; - pwms = <&disp_pwm1 0 500000>; - enable-gpios = <&pio 46 GPIO_ACTIVE_HIGH>; - brightness-levels = <0 1023>; - num-interpolated-steps = <1023>; - default-brightness-level = <576>; - status = "disabled"; - }; - - can_clk: can-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <20000000>; - clock-output-names = "can-clk"; - }; - - edp_panel_fixed_3v3: regulator-0 { - compatible = "regulator-fixed"; - regulator-name = "edp_panel_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&pio 6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&edp_panel_3v3_en_pins>; - }; - - edp_panel_fixed_12v: regulator-1 { - compatible = "regulator-fixed"; - regulator-name = "edp_backlight_12v"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - enable-active-high; - gpio = <&pio 96 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&edp_panel_12v_en_pins>; - }; - - keys: gpio-keys { - compatible = "gpio-keys"; - - button-volume-up { - wakeup-source; - debounce-interval = <100>; - gpios = <&pio 106 GPIO_ACTIVE_LOW>; - label = "volume_up"; - linux,code = ; - }; - }; - - lcm0_iovcc: regulator-vio18-lcm0 { - compatible = "regulator-fixed"; - regulator-name = "vio18_lcm0"; - enable-active-high; - gpio = <&pio 47 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&dsi0_vreg_en_pins>; - vin-supply = <&mt6360_ldo2>; - }; - - lcm0_vddp: regulator-vsys-lcm0 { - compatible = "regulator-fixed"; - regulator-name = "vsys_lcm0"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&mt6360_ldo1>; - }; - - wifi_fixed_3v3: regulator-2 { - compatible = "regulator-fixed"; - regulator-name = "wifi_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&pio 135 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - }; -}; - -&adsp { - memory-region = <&adsp_dma_mem>, <&adsp_mem>; - status = "okay"; -}; - -&afe { - memory-region = <&afe_dma_mem>; - status = "okay"; -}; - -&disp_pwm0 { - pinctrl-names = "default"; - pinctrl-0 = <&disp_pwm0_pins>; - status = "okay"; -}; - -&dither0_in { - remote-endpoint = <&gamma0_out>; -}; - -&dither0_out { - remote-endpoint = <&dsi0_in>; -}; - -&dmic_codec { - wakeup-delay-ms = <200>; -}; - -&dsi0 { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - panel@0 { - compatible = "startek,kd070fhfid078", "himax,hx8279"; - reg = <0>; - backlight = <&backlight_lcm0>; - enable-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; - reset-gpios = <&pio 108 GPIO_ACTIVE_HIGH>; - iovcc-supply = <&lcm0_iovcc>; - vdd-supply = <&lcm0_vddp>; - pinctrl-names = "default"; - pinctrl-0 = <&panel_default_pins>; - - port { - dsi_panel_in: endpoint { - remote-endpoint = <&dsi0_out>; - }; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&dither0_out>; - }; - }; - - port@1 { - reg = <1>; - dsi0_out: endpoint { - remote-endpoint = <&dsi_panel_in>; - }; - }; - }; -}; - -ð { - phy-mode ="rgmii-rxid"; - phy-handle = <ð_phy0>; - snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>; - snps,reset-delays-us = <0 10000 10000>; - mediatek,tx-delay-ps = <2030>; - mediatek,mac-wol; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <ð_default_pins>; - pinctrl-1 = <ð_sleep_pins>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - eth_phy0: ethernet-phy@1 { - compatible = "ethernet-phy-id001c.c916"; - reg = <0x1>; - }; - }; -}; - -&gamma0_out { - remote-endpoint = <&dither0_in>; -}; - -&gpu { - mali-supply = <&mt6315_7_vbuck1>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <400000>; - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "default"; - status = "okay"; - - touchscreen@5d { - compatible = "goodix,gt9271"; - reg = <0x5d>; - interrupts-extended = <&pio 132 IRQ_TYPE_EDGE_RISING>; - irq-gpios = <&pio 132 GPIO_ACTIVE_HIGH>; - reset-gpios = <&pio 133 GPIO_ACTIVE_HIGH>; - AVDD28-supply = <&mt6360_ldo1>; - pinctrl-names = "default"; - pinctrl-0 = <&touch_pins>; - }; -}; - -&i2c2 { - clock-frequency = <400000>; - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - status = "okay"; - - typec-mux@48 { - compatible = "ite,it5205"; - reg = <0x48>; - vcc-supply = <&mt6359_vibr_ldo_reg>; - mode-switch; - orientation-switch; - status = "okay"; - - port { - it5205_sbu_ep: endpoint { - remote-endpoint = <&mt6360_ssusb_sbu_ep>; - }; - }; - }; -}; - -&i2c6 { - clock-frequency = <400000>; - pinctrl-0 = <&i2c6_pins>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - mt6360: pmic@34 { - compatible = "mediatek,mt6360"; - reg = <0x34>; - interrupt-parent = <&pio>; - interrupts = <128 IRQ_TYPE_EDGE_FALLING>; - interrupt-names = "IRQB"; - interrupt-controller; - #interrupt-cells = <1>; - pinctrl-0 = <&mt6360_pins>; - - charger { - compatible = "mediatek,mt6360-chg"; - richtek,vinovp-microvolt = <14500000>; - - otg_vbus_regulator: usb-otg-vbus-regulator { - regulator-name = "usb-otg-vbus"; - regulator-min-microvolt = <4425000>; - regulator-max-microvolt = <5825000>; - }; - }; - - regulator { - compatible = "mediatek,mt6360-regulator"; - LDO_VIN3-supply = <&mt6360_buck2>; - - mt6360_buck1: buck1 { - regulator-name = "emi_vdd2"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1300000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - - mt6360_buck2: buck2 { - regulator-name = "emi_vddq"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1300000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - - mt6360_ldo1: ldo1 { - regulator-name = "tp1_p3v0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - - mt6360_ldo2: ldo2 { - regulator-name = "panel1_p1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo3: ldo3 { - regulator-name = "vmc_pmu"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3600000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo5: ldo5 { - regulator-name = "vmch_pmu"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3600000>; - regulator-allowed-modes = ; - }; - - /* This is a measure point, which name is mt6360_ldo1 on schematic */ - mt6360_ldo6: ldo6 { - regulator-name = "mt6360_ldo1"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <2100000>; - regulator-allowed-modes = ; - }; - - mt6360_ldo7: ldo7 { - regulator-name = "emi_vmddr_en"; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <2100000>; - regulator-allowed-modes = ; - regulator-always-on; - }; - }; - - tcpc { - compatible = "mediatek,mt6360-tcpc"; - interrupts-extended = <&pio 17 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "PD_IRQB"; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - op-sink-microwatt = <10000000>; - power-role = "dual"; - try-power-role = "sink"; - - source-pdos = ; - sink-pdos = ; - - pd-revision = /bits/ 8 <0x03 0x01 0x01 0x06>; - - altmodes { - displayport { - svid = /bits/ 16 <0xff01>; - vdo = <0x00001c46>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - typec_con_hs: endpoint { - remote-endpoint = <&mtu3_hs0_role_sw>; - }; - }; - - port@1 { - reg = <1>; - typec_con_ss: endpoint { - remote-endpoint = <&mtu3_ss0_role_sw>; - }; - }; - - port@2 { - reg = <2>; - mt6360_ssusb_sbu_ep: endpoint { - remote-endpoint = <&it5205_sbu_ep>; - }; - }; - }; - }; - }; - }; -}; - -&mfg0 { - domain-supply = <&mt6315_7_vbuck1>; -}; - -&mfg1 { - domain-supply = <&mt6359_vsram_others_ldo_reg>; -}; - -&mipi_tx0 { - status = "okay"; -}; - -&mmc0 { - status = "okay"; - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&mmc0_default_pins>; - pinctrl-1 = <&mmc0_uhs_pins>; - bus-width = <8>; - max-frequency = <200000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - cap-mmc-hw-reset; - no-sdio; - no-sd; - hs400-ds-delay = <0x14c11>; - vmmc-supply = <&mt6359_vemc_1_ldo_reg>; - vqmmc-supply = <&mt6359_vufs_ldo_reg>; - non-removable; -}; - -&mmc1 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&mmc1_default_pins>; - pinctrl-1 = <&mmc1_uhs_pins>; - bus-width = <4>; - max-frequency = <200000000>; - cap-sd-highspeed; - sd-uhs-sdr50; - sd-uhs-sdr104; - no-mmc; - no-sdio; - vmmc-supply = <&mt6360_ldo5>; - vqmmc-supply = <&mt6360_ldo3>; - status = "okay"; - non-removable; -}; - -&mt6359_vaud18_ldo_reg { - regulator-always-on; -}; - -&mt6359_vbbck_ldo_reg { - regulator-always-on; -}; - -/* For USB Hub */ -&mt6359_vcamio_ldo_reg { - regulator-always-on; -}; - -&mt6359_vcn33_2_bt_ldo_reg { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; -}; - -&mt6359_vcore_buck_reg { - regulator-always-on; -}; - -&mt6359_vgpu11_buck_reg { - regulator-always-on; -}; - -&mt6359_vpu_buck_reg { - regulator-always-on; -}; - -&mt6359_vrf12_ldo_reg { - regulator-always-on; -}; - -/* for GPU SRAM */ -&mt6359_vsram_others_ldo_reg { - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; -}; - -&mt6359codec { - mediatek,mic-type-0 = <1>; /* ACC */ - mediatek,mic-type-1 = <3>; /* DCC */ - mediatek,mic-type-2 = <1>; /* ACC */ -}; - -&ovl0_in { - remote-endpoint = <&vdosys0_ep_main>; -}; - -&pcie0 { - pinctrl-names = "default", "idle"; - pinctrl-0 = <&pcie0_default_pins>; - pinctrl-1 = <&pcie0_idle_pins>; - status = "okay"; -}; - -&pcie1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie1_default_pins>; - status = "disabled"; -}; - -&pciephy { - status = "okay"; -}; - -&pio { - audio_default_pins: audio-default-pins { - pins-cmd-dat { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - disp_pwm1_default_pins: disp-pwm1-default-pins { - pins1 { - pinmux = ; - }; - }; - - edp_panel_12v_en_pins: edp-panel-12v-en-pins { - pins1 { - pinmux = ; - output-high; - }; - }; - - edp_panel_3v3_en_pins: edp-panel-3v3-en-pins { - pins1 { - pinmux = ; - output-high; - }; - }; - - eth_default_pins: eth-default-pins { - pins-cc { - pinmux = , - , - , - ; - drive-strength = <8>; - }; - - pins-mdio { - pinmux = , - ; - input-enable; - }; - - pins-power { - pinmux = , - ; - output-high; - }; - - pins-rxd { - pinmux = , - , - , - ; - }; - - pins-txd { - pinmux = , - , - , - ; - drive-strength = <8>; - }; - }; - - eth_sleep_pins: eth-sleep-pins { - pins-cc { - pinmux = , - , - , - ; - }; - - pins-mdio { - pinmux = , - ; - input-disable; - bias-disable; - }; - - pins-rxd { - pinmux = , - , - , - ; - }; - - pins-txd { - pinmux = , - , - , - ; - }; - }; - - gpio_key_pins: gpio-keys-pins { - pins { - pinmux = ; - bias-pull-up; - input-enable; - }; - }; - - i2c0_pins: i2c0-pins { - pins { - pinmux = , - ; - bias-pull-up = ; - drive-strength-microamp = <1000>; - }; - }; - - i2c1_pins: i2c1-pins { - pins { - pinmux = , - ; - bias-pull-up = ; - drive-strength-microamp = <1000>; - }; - }; - - i2c2_pins: i2c2-pins { - pins { - pinmux = , - ; - bias-pull-up = ; - drive-strength = <6>; - }; - }; - - i2c6_pins: i2c6-pins { - pins { - pinmux = , - ; - bias-pull-up; - }; - }; - - mmc0_default_pins: mmc0-default-pins { - pins-clk { - pinmux = ; - drive-strength = <6>; - bias-pull-down = ; - }; - - pins-cmd-dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength = <6>; - bias-pull-up = ; - }; - - pins-rst { - pinmux = ; - drive-strength = <6>; - bias-pull-up = ; - }; - }; - - mmc0_uhs_pins: mmc0-uhs-pins { - pins-clk { - pinmux = ; - drive-strength = <8>; - bias-pull-down = ; - }; - - pins-cmd-dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength = <8>; - bias-pull-up = ; - }; - - pins-ds { - pinmux = ; - drive-strength = <8>; - bias-pull-down = ; - }; - - pins-rst { - pinmux = ; - drive-strength = <8>; - bias-pull-up = ; - }; - }; - - mmc1_default_pins: mmc1-default-pins { - pins-clk { - pinmux = ; - drive-strength = <8>; - bias-pull-down = ; - }; - - pins-cmd-dat { - pinmux = , - , - , - , - ; - input-enable; - drive-strength = <8>; - bias-pull-up = ; - }; - }; - - mmc1_uhs_pins: mmc1-uhs-pins { - pins-clk { - pinmux = ; - drive-strength = <8>; - bias-pull-down = ; - }; - - pins-cmd-dat { - pinmux = , - , - , - , - ; - input-enable; - drive-strength = <8>; - bias-pull-up = ; - }; - }; - - mt6360_pins: mt6360-pins { - pins { - pinmux = , - ; - input-enable; - bias-pull-up; - }; - }; - - dsi0_vreg_en_pins: dsi0-vreg-en-pins { - pins-pwr-en { - pinmux = ; - output-low; - }; - }; - - panel_default_pins: panel-default-pins { - pins-rst { - pinmux = ; - output-high; - }; - - pins-en { - pinmux = ; - output-low; - }; - }; - - pcie0_default_pins: pcie0-default-pins { - pins { - pinmux = , - , - ; - bias-pull-up; - }; - }; - - pcie0_idle_pins: pcie0-idle-pins { - pins { - pinmux = ; - bias-disable; - output-low; - }; - }; - - pcie1_default_pins: pcie1-default-pins { - pins { - pinmux = , - , - ; - bias-pull-up; - }; - }; - - disp_pwm0_pins: disp-pwm0-pins { - pins-disp-pwm { - pinmux = ; - }; - }; - - spi1_pins: spi1-pins { - pins { - pinmux = , - , - , - ; - bias-disable; - }; - }; - - spi2_pins: spi-pins { - pins { - pinmux = , - , - , - ; - bias-disable; - }; - }; - - touch_pins: touch-pins { - pins-irq { - pinmux = ; - input-enable; - bias-disable; - }; - - pins-reset { - pinmux = ; - output-high; - }; - }; - - u3_p0_vbus: u3-p0-vbus-default-pins { - pins-vbus { - pinmux = ; - input-enable; - }; - }; - - uart0_pins: uart0-pins { - pins { - pinmux = , - ; - }; - }; - - uart1_pins: uart1-pins { - pins { - pinmux = , - , - , - ; - }; - }; -}; - -&pmic { - interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; - - mt6359keys: keys { - compatible = "mediatek,mt6359-keys"; - mediatek,long-press-mode = <1>; - power-off-time-sec = <0>; - - power-key { - linux,keycodes = ; - wakeup-source; - }; - - home { - linux,keycodes = ; - }; - }; -}; - -&scp { - memory-region = <&scp_mem>; - firmware-name = "mediatek/mt8195/scp.img"; - status = "okay"; -}; - -&sound { - compatible = "mediatek,mt8195_mt6359"; - model = "mt8395-evk"; - pinctrl-names = "default"; - pinctrl-0 = <&audio_default_pins>; - audio-routing = - "Headphone", "Headphone L", - "Headphone", "Headphone R"; - mediatek,adsp = <&adsp>; - status = "okay"; - - headphone-dai-link { - link-name = "DL_SRC_BE"; - - codec { - sound-dai = <&pmic 0>; - }; - }; -}; - -&spi1 { - pinctrl-0 = <&spi1_pins>; - pinctrl-names = "default"; - mediatek,pad-select = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - cs-gpios = <&pio 64 GPIO_ACTIVE_LOW>; - - can0: can@0 { - compatible = "microchip,mcp2518fd"; - reg = <0>; - clocks = <&can_clk>; - spi-max-frequency = <20000000>; - interrupts-extended = <&pio 16 IRQ_TYPE_LEVEL_LOW>; - vdd-supply = <&mt6359_vcn33_2_bt_ldo_reg>; - xceiver-supply = <&mt6359_vcn33_2_bt_ldo_reg>; - }; -}; - -&spi2 { - pinctrl-0 = <&spi2_pins>; - pinctrl-names = "default"; - mediatek,pad-select = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; -}; - -&spmi { - #address-cells = <2>; - #size-cells = <0>; - - mt6315_6: pmic@6 { - compatible = "mediatek,mt6315-regulator"; - reg = <0x6 SPMI_USID>; - - regulators { - mt6315_6_vbuck1: vbuck1 { - regulator-name = "Vbcpu"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1193750>; - regulator-enable-ramp-delay = <256>; - regulator-allowed-modes = <0 1 2>; - regulator-always-on; - }; - }; - }; - - mt6315_7: pmic@7 { - compatible = "mediatek,mt6315-regulator"; - reg = <0x7 SPMI_USID>; - - regulators { - mt6315_7_vbuck1: vbuck1 { - regulator-name = "Vgpu"; - regulator-min-microvolt = <546000>; - regulator-max-microvolt = <787000>; - regulator-enable-ramp-delay = <256>; - regulator-allowed-modes = <0 1 2>; - }; - }; - }; -}; - -&u3phy0 { - status = "okay"; -}; - -&u3phy1 { - status = "okay"; - - u3port1: usb-phy@700 { - mediatek,force-mode; - }; -}; - -&u3phy2 { - status = "okay"; -}; - -&u3phy3 { - status = "okay"; -}; - -&uart0 { - pinctrl-0 = <&uart0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&uart1 { - pinctrl-0 = <&uart1_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&ufsphy { - status = "disabled"; -}; - -&ssusb0 { - dr_mode = "otg"; - pinctrl-names = "default"; - pinctrl-0 = <&u3_p0_vbus>; - usb-role-switch; - vusb33-supply = <&mt6359_vusb_ldo_reg>; - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - mtu3_hs0_role_sw: endpoint { - remote-endpoint = <&typec_con_hs>; - }; - }; - - port@1 { - reg = <1>; - mtu3_ss0_role_sw: endpoint { - remote-endpoint = <&typec_con_ss>; - }; - }; - }; -}; - -&ssusb2 { - vusb33-supply = <&mt6359_vusb_ldo_reg>; - status = "okay"; -}; - -&ssusb3 { - vusb33-supply = <&mt6359_vusb_ldo_reg>; - status = "okay"; -}; - -&vdosys0 { - port { - #address-cells = <1>; - #size-cells = <0>; - - vdosys0_ep_main: endpoint@0 { - reg = <0>; - remote-endpoint = <&ovl0_in>; - }; - }; -}; - -&xhci0 { - status = "okay"; -}; - -&xhci1 { - vusb33-supply = <&mt6359_vusb_ldo_reg>; - status = "okay"; -}; - -&xhci2 { - status = "okay"; -}; - -&xhci3 { - status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi similarity index 99% copy from arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts copy to arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi index cf8cd37f5708..3b679626e8a1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi @@ -17,10 +17,6 @@ #include / { - model = "MediaTek Genio 1200 EVK-P1V2-EMMC"; - compatible = "mediatek,mt8395-evk", "mediatek,mt8395", - "mediatek,mt8195"; - aliases { serial0 = &uart0; ethernet0 = ð -- 2.45.2