From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39849CAC581 for ; Sat, 6 Sep 2025 00:14:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nLCXREPNi4TcJ1BYbePcTdlLX0+ZkeLublBsxs8Nd74=; b=QYENWYNwyYExzjCxnyJLn1NDMf LZgJ9Li+bJlRIIIF7kJvUNpnB5dwx/SugtvlQ99FcLNbKyWYiUuPLhkBf4YY23WEACJ5+6b1nVt6V /O42MVmP5Q/U4g4OaJ+Oh/AxTYPK1IrR1Uc8WKkFcJNvGDXkrOtQruw/MoKyX0OXJd3SUxEQ2+NJP RLI8Hx5HbsL0cRZHxZgrKfwS15fAiNj2xBhrBQuzchRld0yxmyWqOrptBSfJSOcMaMuer7xfgHv74 BHbqPuZuJBKi8ek85cjeB0mmIzs0Bpfh4oAjP27KuAhnidwnTu5YYNwtkrfqJgwDUASL8x3O3qkk3 9f0RWoVg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uugZi-00000005Ytx-1dIK; Sat, 06 Sep 2025 00:14:38 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uufta-00000005HYY-0Tuh; Fri, 05 Sep 2025 23:31:06 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 5BF6B601AE; Fri, 5 Sep 2025 23:31:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D73B5C4CEF1; Fri, 5 Sep 2025 23:31:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757115064; bh=BhvkplneeHvq8+/St2DrA4zwRkq9v6hH9fZ+08hzphw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=pt7bN0Dr2EYWLSdBhCvlwbVMIYN3Ig8y/jgrzdnjRjxPAEUR46bNQtiTCEvVSHeuz sCZxBz/5gODblGYi6JpgvycV+FGAuMVxvqTx6daLEhapSXeUj3RBEmsv2V8vdzWz7f r3qvSbqGlue6IoiNwrZ8O+3bcqhxIAS1N3hSwhbClKHNHtcamaW0zeq6NvR1fysEZc UnDKZbtbdbj9/gHoF3stVdM0pNNB51k/cFyuOd6c6NbGT0awSMZ6PhIMUu2cr47nVK vEoUOVaes6PpH/SxAphgsq5A3Ru1GENiXcWKSNUgD/I2GXH8EEg+jLGqyJQGel1jxx u4Em+O4BGCRmQ== Date: Fri, 5 Sep 2025 18:31:03 -0500 From: Rob Herring To: Nicolas Frattaroli Cc: AngeloGioacchino Del Regno , Boris Brezillon , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Jassi Brar , Kees Cook , "Gustavo A. R. Silva" , Chia-I Wu , Chen-Yu Tsai , kernel@collabora.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org, linux-hardening@vger.kernel.org Subject: Re: [PATCH RFC 04/10] dt-bindings: mailbox: Add MT8196 GPUEB Mailbox Message-ID: <20250905233103.GA1508406-robh@kernel.org> References: <20250905-mt8196-gpufreq-v1-0-7b6c2d6be221@collabora.com> <20250905-mt8196-gpufreq-v1-4-7b6c2d6be221@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250905-mt8196-gpufreq-v1-4-7b6c2d6be221@collabora.com> X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Fri, Sep 05, 2025 at 12:23:00PM +0200, Nicolas Frattaroli wrote: > The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB", > acting as glue logic to control power and frequency of the Mali GPU. > This MCU runs proprietary firmware for this purpose, and the main > application processor communicates with it through a mailbox. > > Add a binding that describes this mailbox. > > Signed-off-by: Nicolas Frattaroli > --- > .../mailbox/mediatek,mt8196-gpueb-mbox.yaml | 64 ++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..506723d54ae0a429b462914f3666184c24c4fc5a > --- /dev/null > +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-gpueb-mbox.yaml > @@ -0,0 +1,64 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-gpueb-mbox.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek MFlexGraphics GPUEB Mailbox Controller > + > +maintainers: > + - Nicolas Frattaroli > + > +properties: > + compatible: > + enum: > + - mediatek,mt8196-gpueb-mbox > + > + reg: > + items: > + - description: mailbox data registers > + - description: mailbox control registers > + > + reg-names: > + items: > + - const: mbox > + - const: mbox_ctl 'mbox' is redundant. So 'data' and 'ctl'? > + > + clocks: > + items: > + - description: main clock of the GPUEB MCU > + > + interrupts: > + items: > + - description: fires when a new message is received > + > + "#mbox-cells": > + const: 1 > + description: > + The number of the mailbox channel. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - interrupts > + - "#mbox-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + gpueb_mbox: mailbox@4b09fd80 { Drop unused labels. > + compatible = "mediatek,mt8196-gpueb-mbox"; > + reg = <0x4b09fd80 0x280>, > + <0x4b170000 0x7c>; > + reg-names = "mbox", "mbox_ctl"; > + clocks = <&topckgen CLK_TOP_MFG_EB>; > + interrupts = ; > + #mbox-cells = <1>; > + }; > > -- > 2.51.0 >