From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1F35CCFA1C for ; Thu, 6 Nov 2025 12:44:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5bjf1Grep5o57O7yDujdNivtzNopvWOK2E/ugqJt1CY=; b=1zzLRBcUGuAQYOF9kZaIuPCg0p 20B7JpfXayGp1xjMpLhKKGZbmIpE4nrSEM8u0brVOrG3O6cCUqRNa8oFHQdvp7wtciHW23sMO942i Eq62RwnZbJwqIjsRx4p66AVr+yPTlJa09dSx+yW+2vvFq6xJIhXBPyhxIrvAc6sBn0fqTgPydv/Zk b8tcN9QedlitEf8QJdStItuiaWC2i8uTchsHYzWI6A2zBTkCT7q67f2MNCAKiSwfRjeKxqRd0OdGZ RjnFPdlGdgvzQbmZbBhcNBj0We0HCv9AbygvXKernjfMPWN8GvbCYayaHVXln/2+5H4T8BYLkvf5g sEYUhRXQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vGzLQ-0000000FTre-27xr; Thu, 06 Nov 2025 12:44:04 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vGzLB-0000000FTTP-0ymz; Thu, 06 Nov 2025 12:43:52 +0000 X-UUID: 3886bce6bb0e11f0a52f393f94899d25-20251106 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=5bjf1Grep5o57O7yDujdNivtzNopvWOK2E/ugqJt1CY=; b=RV3e0e0tkl/aBZ/V0nxa+AewgRZfHI6EVcnP1359DWFB2nRQ3lzdg/v1FApZSh5xxH+jZLiP6YgWIpoV+5uHx0nT+hiD1gA7Om35/C7TXI8eDBtRaeX8mntMqbjd6ijY95YeNE9m3P2M56ROoZNyB3OgzLFPT7uGHBraEe5x2pM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.6,REQID:e710be8c-1f5c-47fa-b1bc-99dee89e2496,IP:0,UR L:0,TC:0,Content:0,EDM:-25,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-25 X-CID-META: VersionHash:a9d874c,CLOUDID:e013fc7c-f9d7-466d-a1f7-15b5fcad2ce6,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:2,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI :0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 3886bce6bb0e11f0a52f393f94899d25-20251106 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1582647136; Thu, 06 Nov 2025 05:43:40 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.26; Thu, 6 Nov 2025 20:43:37 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1748.26 via Frontend Transport; Thu, 6 Nov 2025 20:43:37 +0800 From: irving.ch.lin To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ulf Hansson , Richard Cochran CC: Qiqi Wang , , , , , , , , , , , , Subject: [PATCH v3 03/21] clk: mediatek: fix mfg mux issue Date: Thu, 6 Nov 2025 20:41:48 +0800 Message-ID: <20251106124330.1145600-4-irving-ch.lin@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20251106124330.1145600-1-irving-ch.lin@mediatek.com> References: <20251106124330.1145600-1-irving-ch.lin@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251106_044349_309485_844938FE X-CRM114-Status: GOOD ( 11.15 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: Irving-CH Lin MFG mux design is different for MTK SoCs, For MT8189, we need to enable parent first to garentee parent clock stable. Signed-off-by: Irving-CH Lin --- drivers/clk/mediatek/clk-mux.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/mediatek/clk-mux.c b/drivers/clk/mediatek/clk-mux.c index c5af6dc078a3..15309c7dbbfb 100644 --- a/drivers/clk/mediatek/clk-mux.c +++ b/drivers/clk/mediatek/clk-mux.c @@ -414,16 +414,20 @@ static int mtk_clk_mux_notifier_cb(struct notifier_block *nb, struct clk_notifier_data *data = _data; struct clk_hw *hw = __clk_get_hw(data->clk); struct mtk_mux_nb *mux_nb = to_mtk_mux_nb(nb); + struct clk_hw *p_hw = clk_hw_get_parent_by_index(hw, + mux_nb->bypass_index); int ret = 0; switch (event) { case PRE_RATE_CHANGE: + clk_prepare_enable(p_hw->clk); mux_nb->original_index = mux_nb->ops->get_parent(hw); ret = mux_nb->ops->set_parent(hw, mux_nb->bypass_index); break; case POST_RATE_CHANGE: case ABORT_RATE_CHANGE: ret = mux_nb->ops->set_parent(hw, mux_nb->original_index); + clk_disable_unprepare(p_hw->clk); break; } -- 2.45.2