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[68.46.10.116]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8caf9ee9fbasm978632285a.39.2026.02.09.21.40.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Feb 2026 21:40:53 -0800 (PST) From: Adam Ford To: linux-mediatek@lists.infradead.org Cc: angelogioacchino.delregno@collabora.com, Adam Ford , Michael Turquette , Stephen Boyd , Matthias Brugger , Ulf Hansson , Liam Girdwood , Mark Brown , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Laura Nao , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 2/5] clk: mediatek: Fix MT8196 topckgen2 orphan clocks Date: Mon, 9 Feb 2026 23:37:02 -0600 Message-ID: <20260210053708.17239-2-aford173@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260210053708.17239-1-aford173@gmail.com> References: <20260210053708.17239-1-aford173@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260209_214056_674168_35C2E238 X-CRM114-Status: GOOD ( 10.59 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org There are a few clocks with names spelled incorrecly, so when a child tries to associate itself to a parent, there isn't a parent. Fixing the names restores the proper parent-child relations of these clocks and eliminates the orphaned clocks. Fixes: b093e0f17099 ("clk: mediatek: Add MT8196 topckgen2 clock support") Signed-off-by: Adam Ford --- drivers/clk/mediatek/clk-mt8196-topckgen2.c | 92 ++++++++++----------- 1 file changed, 46 insertions(+), 46 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8196-topckgen2.c b/drivers/clk/mediatek/clk-mt8196-topckgen2.c index 6df93d7fbf91..a260366ae9f9 100644 --- a/drivers/clk/mediatek/clk-mt8196-topckgen2.c +++ b/drivers/clk/mediatek/clk-mt8196-topckgen2.c @@ -147,13 +147,13 @@ static const struct mtk_fixed_factor top_divs[] = { static const char * const seninf_parents[] = { "clk26m", - "ck_osc_d10", - "ck_osc_d8", - "ck_osc_d5", - "ck_osc_d4", + "osc_d10", + "osc_d8", + "osc_d5", + "osc_d4", "univpll2_d6_d2", "mainpll2_d9", - "ck_osc_d2", + "osc_d2", "mainpll2_d4_d2", "univpll2_d4_d2", "mmpll2_d4_d2", @@ -166,10 +166,10 @@ static const char * const seninf_parents[] = { static const char * const img1_parents[] = { "clk26m", - "ck_osc_d4", - "ck_osc_d3", + "osc_d4", + "osc_d3", "mmpll2_d6_d2", - "ck_osc_d2", + "osc_d2", "imgpll_d5_d2", "mmpll2_d5_d2", "univpll2_d4_d2", @@ -185,24 +185,24 @@ static const char * const img1_parents[] = { static const char * const ipe_parents[] = { "clk26m", - "ck_osc_d4", - "ck_osc_d3", - "ck_osc_d2", + "osc_d4", + "osc_d3", + "osc_d2", "univpll2_d6", "mmpll2_d6", "univpll2_d5", "imgpll_d5", - "ck_mainpll_d4", + "mainpll_d4", "mmpll2_d5", "imgpll_d4" }; static const char * const cam_parents[] = { "clk26m", - "ck_osc_d10", - "ck_osc_d4", - "ck_osc_d3", - "ck_osc_d2", + "osc_d10", + "osc_d4", + "osc_d3", + "osc_d2", "mmpll2_d5_d2", "univpll2_d4_d2", "univpll2_d7", @@ -219,8 +219,8 @@ static const char * const cam_parents[] = { static const char * const camtm_parents[] = { "clk26m", "univpll2_d6_d4", - "ck_osc_d4", - "ck_osc_d3", + "osc_d4", + "osc_d3", "univpll2_d6_d2" }; @@ -239,7 +239,7 @@ static const char * const dpe_parents[] = { static const char * const vdec_parents[] = { "clk26m", - "ck_mainpll_d5_d2", + "mainpll_d5_d2", "mainpll2_d4_d4", "mainpll2_d7_d2", "mainpll2_d6_d2", @@ -256,9 +256,9 @@ static const char * const vdec_parents[] = { static const char * const ccusys_parents[] = { "clk26m", - "ck_osc_d4", - "ck_osc_d3", - "ck_osc_d2", + "osc_d4", + "osc_d3", + "osc_d2", "mmpll2_d5_d2", "univpll2_d4_d2", "mmpll2_d7", @@ -273,8 +273,8 @@ static const char * const ccusys_parents[] = { static const char * const ccutm_parents[] = { "clk26m", "univpll2_d6_d4", - "ck_osc_d4", - "ck_osc_d3", + "osc_d4", + "osc_d3", "univpll2_d6_d2" }; @@ -309,14 +309,14 @@ static const char * const dp0_parents[] = { "tvdpll1_d16", "tvdpll1_d8", "tvdpll1_d4", - "ck_tvdpll1_d2" + "tvdpll1_d2" }; static const char * const disp_parents[] = { "clk26m", - "ck_mainpll_d5_d2", - "ck_mainpll_d4_d2", - "ck_mainpll_d6", + "mainpll_d5_d2", + "mainpll_d4_d2", + "mainpll_d6", "mainpll2_d5", "mmpll2_d6", "mainpll2_d4", @@ -326,7 +326,7 @@ static const char * const disp_parents[] = { static const char * const mdp_parents[] = { "clk26m", - "ck_mainpll_d5_d2", + "mainpll_d5_d2", "mainpll2_d5_d2", "mmpll2_d6_d2", "mainpll2_d9", @@ -342,13 +342,13 @@ static const char * const mdp_parents[] = { static const char * const mminfra_parents[] = { "clk26m", - "ck_osc_d4", - "ck_mainpll_d7_d2", - "ck_mainpll_d5_d2", - "ck_mainpll_d9", + "osc_d4", + "mainpll_d7_d2", + "mainpll_d5_d2", + "mainpll_d9", "mmpll2_d6_d2", "mainpll2_d4_d2", - "ck_mainpll_d6", + "mainpll_d6", "univpll2_d6", "mainpll2_d5", "mmpll2_d6", @@ -361,14 +361,14 @@ static const char * const mminfra_parents[] = { static const char * const mminfra_snoc_parents[] = { "clk26m", - "ck_osc_d4", - "ck_mainpll_d7_d2", - "ck_mainpll_d9", - "ck_mainpll_d7", - "ck_mainpll_d6", + "osc_d4", + "mainpll_d7_d2", + "mainpll_d9", + "mainpll_d7", + "mainpll_d6", "mmpll2_d4_d2", - "ck_mainpll_d5", - "ck_mainpll_d4", + "mainpll_d5", + "mainpll_d4", "univpll2_d4", "mmpll2_d4", "mainpll2_d3", @@ -381,17 +381,17 @@ static const char * const mmup_parents[] = { "clk26m", "mainpll2_d6", "mainpll2_d5", - "ck_osc_d2", - "ck_osc", - "ck_mainpll_d4", + "osc_d2", + "ulposc", + "mainpll_d4", "univpll2_d4", "mainpll2_d3" }; static const char * const mminfra_ao_parents[] = { "clk26m", - "ck_osc_d4", - "ck_mainpll_d3" + "osc_d4", + "mainpll_d3" }; static const char * const dvo_parents[] = { -- 2.51.0