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Mon, 20 Jul 2026 02:21:39 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2a00:79e0:201d:8:3916:f048:32c3:931f]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344be458sm53775345ad.25.2026.07.20.02.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 02:21:39 -0700 (PDT) From: Chen-Yu Tsai To: Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas Cc: Matthias Brugger , AngeloGioacchino Del Regno , Chen-Yu Tsai , linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Conor Dooley Subject: [PATCH RESEND] dt-bindings: PCI: mediatek-gen3: Allow memory-region for restricted DMA buffer Date: Mon, 20 Jul 2026 17:21:15 +0800 Message-ID: <20260720092116.1823562-1-wenst@chromium.org> X-Mailer: git-send-email 2.55.0.229.g6434b31f56-goog MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260720_022140_718136_BFE76A36 X-CRM114-Status: GOOD ( 11.79 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On some SoCs without an IOMMU behind the PCIe controller, the PCIe controller memory access could be limited to a small region by the firmware configuring a memory protection unit. This memory region must be assigned to the PCIe controller so that the OS knows to use that region. Otherwise PCIe devices would not work properly. Allow the memory-region property with one item pointing to a restricted DMA buffer. Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Signed-off-by: Chen-Yu Tsai --- Can we get this merged for v7.2? A matching device tree change was already merged in v7.2-rc1. Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index fbc0378392d4..b88717dec1fa 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -116,6 +116,10 @@ properties: power-domains: maxItems: 1 + memory-region: + maxItems: 1 + description: phandle to restricted DMA buffer + mediatek,pbus-csr: $ref: /schemas/types.yaml#/definitions/phandle-array items: -- 2.55.0.229.g6434b31f56-goog