From: Christian Marangi <ansuelsmth@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Christian Marangi <ansuelsmth@gmail.com>,
Daniel Golle <daniel@makrotopia.org>,
Qingfang Deng <dqfext@gmail.com>,
SkyLake Huang <SkyLake.Huang@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: [PATCH net-next v2 3/6] net: phy: mediatek: generalize cal_cycle function for GE SoC
Date: Fri, 24 Jul 2026 21:08:06 +0200 [thread overview]
Message-ID: <20260724190811.198339-4-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20260724190811.198339-1-ansuelsmth@gmail.com>
In preparation for support of special Software Calibration for Airoha PHY,
it's needed to generalize the cal_cycle function as Airoha needs only
part of its logic (the wait logic) to complete a calibration cycle.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/net/phy/mediatek/mtk-ge-soc.c | 32 ++++++++++++++++++---------
drivers/net/phy/mediatek/mtk-ge-soc.h | 3 +++
2 files changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/net/phy/mediatek/mtk-ge-soc.c b/drivers/net/phy/mediatek/mtk-ge-soc.c
index c25292f7178a..b4d73954072e 100644
--- a/drivers/net/phy/mediatek/mtk-ge-soc.c
+++ b/drivers/net/phy/mediatek/mtk-ge-soc.c
@@ -39,20 +39,11 @@ struct mtk_socphy_shared {
struct mtk_socphy_priv priv[4];
};
-/* One calibration cycle consists of:
- * 1.Set DA_CALIN_FLAG high to start calibration. Keep it high
- * until AD_CAL_COMP is ready to output calibration result.
- * 2.Wait until DA_CAL_CLK is available.
- * 3.Fetch AD_CAL_COMP_OUT.
- */
-static int cal_cycle(struct phy_device *phydev, int devad,
- u32 regnum, u16 mask, u16 cal_val)
+int mtk_cal_cycle_wait(struct phy_device *phydev)
{
int reg_val;
int ret;
- phy_modify_mmd(phydev, devad, regnum,
- mask, cal_val);
phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN,
MTK_PHY_DA_CALIN_FLAG);
@@ -71,7 +62,26 @@ static int cal_cycle(struct phy_device *phydev, int devad,
ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP);
if (ret < 0)
return ret;
- ret = FIELD_GET(MTK_PHY_AD_CAL_COMP_OUT_MASK, ret);
+
+ return FIELD_GET(MTK_PHY_AD_CAL_COMP_OUT_MASK, ret);
+}
+EXPORT_SYMBOL_GPL(mtk_cal_cycle_wait);
+
+/* One calibration cycle consists of:
+ * 1.Set DA_CALIN_FLAG high to start calibration. Keep it high
+ * until AD_CAL_COMP is ready to output calibration result.
+ * 2.Wait until DA_CAL_CLK is available.
+ * 3.Fetch AD_CAL_COMP_OUT.
+ */
+static int cal_cycle(struct phy_device *phydev, int devad,
+ u32 regnum, u16 mask, u16 cal_val)
+{
+ int ret;
+
+ phy_modify_mmd(phydev, devad, regnum,
+ mask, cal_val);
+
+ ret = mtk_cal_cycle_wait(phydev);
phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret);
return ret;
diff --git a/drivers/net/phy/mediatek/mtk-ge-soc.h b/drivers/net/phy/mediatek/mtk-ge-soc.h
index 349dfbdff1fa..9aaa7e3caa41 100644
--- a/drivers/net/phy/mediatek/mtk-ge-soc.h
+++ b/drivers/net/phy/mediatek/mtk-ge-soc.h
@@ -345,4 +345,7 @@ enum CAL_MODE {
SW_M
};
+/* MTK GE SoC common functions */
+int mtk_cal_cycle_wait(struct phy_device *phydev);
+
#endif /* _MTK_GE_SOC_H_ */
--
2.53.0
next prev parent reply other threads:[~2026-07-24 19:08 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-24 19:08 [PATCH net-next v2 0/6] net: phy: mediatek: calibration for AN7581/3 Christian Marangi
2026-07-24 19:08 ` [PATCH net-next v2 1/6] net: phy: mediatek: export __mtk_tr_write Christian Marangi
2026-07-24 19:08 ` [PATCH net-next v2 2/6] net: phy: mediatek: move MTK GE SoC registers define to dedicated header Christian Marangi
2026-07-24 19:08 ` Christian Marangi [this message]
2026-07-24 19:08 ` [PATCH net-next v2 4/6] net: phy: mediatek: split Airoha code to dedicated source Christian Marangi
2026-07-24 19:08 ` [PATCH net-next v2 5/6] net: phy: mediatek: add calibration logic for AN7581 Christian Marangi
2026-07-24 19:08 ` [PATCH net-next v2 6/6] net: phy: mediatek: add calibration logic for AN7583 Christian Marangi
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