Re: [PATCH] wifi: mt76: connac3: refactor CLC header type validation logic

[kernel test robot <lkp@intel.com>]

Hi JB,

kernel test robot noticed the following build errors:

[auto build test ERROR on wireless-next/main]
[also build test ERROR on wireless/main linus/master v7.2-rc4 next-20260723]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/JB-Tsai/wifi-mt76-connac3-refactor-CLC-header-type-validation-logic/20260724-170015
base:   https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git main
patch link:    https://lore.kernel.org/r/20260724085124.3156143-1-jb.tsai%40mediatek.com
patch subject: [PATCH] wifi: mt76: connac3: refactor CLC header type validation logic
config: x86_64-rhel-9.4-bpf (https://download.01.org/0day-ci/archive/20260725/202607250538.5NE4yF8u-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260725/202607250538.5NE4yF8u-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202607250538.5NE4yF8u-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/net/wireless/mediatek/mt76/mt7925/mcu.c: In function 'mt7925_load_clc':
>> drivers/net/wireless/mediatek/mt76/mt7925/mcu.c:866:68: error: 'MT792x_CLC_REGD' undeclared (first use in this function); did you mean 'MT7925_CLC_CHAN'?
     866 |                 if ((clc->idx == MT792x_CLC_BE_CTRL || clc->idx == MT792x_CLC_REGD) &&
         |                                                                    ^~~~~~~~~~~~~~~
         |                                                                    MT7925_CLC_CHAN
   drivers/net/wireless/mediatek/mt76/mt7925/mcu.c:866:68: note: each undeclared identifier is reported only once for each function it appears in


vim +866 drivers/net/wireless/mediatek/mt76/mt7925/mcu.c

   797	
   798	static int mt7925_load_clc(struct mt792x_dev *dev, const char *fw_name)
   799	{
   800		const struct mt76_connac2_fw_trailer *hdr;
   801		const struct mt76_connac2_fw_region *region;
   802		const struct mt7925_clc *clc;
   803		struct mt76_dev *mdev = &dev->mt76;
   804		struct mt792x_phy *phy = &dev->phy;
   805		const struct firmware *fw;
   806		u8 *clc_base = NULL, hw_encap = 0;
   807		int ret, i, len, offset = 0;
   808	
   809		dev->phy.clc_chan_conf = 0xff;
   810		dev->regd_user = false;
   811		if (!mt7925_regd_clc_supported(dev))
   812			return 0;
   813	
   814		if (mt76_is_mmio(&dev->mt76)) {
   815			ret = mt7925_mcu_read_eeprom(dev, MT_EE_HW_TYPE, &hw_encap);
   816			if (ret)
   817				return ret;
   818			hw_encap = u8_get_bits(hw_encap, MT_EE_HW_TYPE_ENCAP);
   819		}
   820	
   821		ret = request_firmware(&fw, fw_name, mdev->dev);
   822		if (ret)
   823			return ret;
   824	
   825		if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
   826			dev_err(mdev->dev, "Invalid firmware\n");
   827			ret = -EINVAL;
   828			goto out;
   829		}
   830	
   831		hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
   832		for (i = 0; i < hdr->n_region; i++) {
   833			region = (const void *)((const u8 *)hdr -
   834						(hdr->n_region - i) * sizeof(*region));
   835			len = le32_to_cpu(region->len);
   836	
   837			/* check if we have valid buffer size */
   838			if (offset + len > fw->size) {
   839				dev_err(mdev->dev, "Invalid firmware region\n");
   840				ret = -EINVAL;
   841				goto out;
   842			}
   843	
   844			if ((region->feature_set & FW_FEATURE_NON_DL) &&
   845			    region->type == FW_TYPE_CLC) {
   846				clc_base = (u8 *)(fw->data + offset);
   847				break;
   848			}
   849			offset += len;
   850		}
   851	
   852		if (!clc_base)
   853			goto out;
   854	
   855		for (offset = 0; offset < len; offset += le32_to_cpu(clc->len)) {
   856			clc = (const struct mt7925_clc *)(clc_base + offset);
   857	
   858			if (clc->idx >= ARRAY_SIZE(phy->clc))
   859				break;
   860	
   861			/* do not init buf again if chip reset triggered */
   862			if (phy->clc[clc->idx])
   863				continue;
   864	
   865			/* header content sanity */
 > 866			if ((clc->idx == MT792x_CLC_BE_CTRL || clc->idx == MT792x_CLC_REGD) &&
   867			    u8_get_bits(clc->t2.type, MT_EE_HW_TYPE_ENCAP) != hw_encap)
   868				continue;
   869	
   870			if (clc->idx != MT792x_CLC_BE_CTRL && clc->idx != MT792x_CLC_REGD &&
   871			    u8_get_bits(clc->t0.type, MT_EE_HW_TYPE_ENCAP) != hw_encap)
   872				continue;
   873	
   874			phy->clc[clc->idx] = devm_kmemdup(mdev->dev, clc,
   875							  le32_to_cpu(clc->len),
   876							  GFP_KERNEL);
   877	
   878			if (!phy->clc[clc->idx]) {
   879				ret = -ENOMEM;
   880				goto out;
   881			}
   882		}
   883	
   884		ret = mt7925_regd_init(phy);
   885	out:
   886		release_firmware(fw);
   887	
   888		return ret;
   889	}
   890	

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