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([81.56.18.151]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-499a9b7c987sm27316965e9.1.2026.08.19.03.19.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Aug 2026 03:19:20 -0700 (PDT) From: Luca Leonardo Scorcia To: linux-mediatek@lists.infradead.org Cc: Luca Leonardo Scorcia , Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 5/7] watchdog: mediatek: Add support for mt8167 toprgu/watchdog Date: Wed, 19 Aug 2026 12:16:26 +0200 Message-ID: <20260819101853.44681-6-l.scorcia@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260819101853.44681-1-l.scorcia@gmail.com> References: <20260819101853.44681-1-l.scorcia@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260819_031923_058902_858D5F59 X-CRM114-Status: GOOD ( 19.64 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add support for the Top Reset Generation Unit/Watchdog Timer found on mt8167. Since according to its data sheet mt8167 toprgu reset bits are not contiguous, add support for a reset table to the driver. This lets us define reset identifiers as contiguous indexes in the binding headers. Also address a preexisting Sashiko finding that noticed that the has_swsysrst_en configuration was set after the reset controller registration. Signed-off-by: Luca Leonardo Scorcia --- drivers/watchdog/mtk_wdt.c | 47 ++++++++++++++++++++++++++++++++++---- 1 file changed, 43 insertions(+), 4 deletions(-) diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index f8208fb0f723..fa522fd80dd4 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -78,11 +79,14 @@ struct mtk_wdt_dev { bool disable_wdt_extrst; bool reset_by_toprgu; bool has_swsysrst_en; + const u8 *toprgu_sw_rst_tb; + int toprgu_sw_rst_num; }; struct mtk_wdt_data { - int toprgu_sw_rst_num; - bool has_swsysrst_en; + const u8 *toprgu_sw_rst_tb; + const int toprgu_sw_rst_num; + const bool has_swsysrst_en; }; static const struct mtk_wdt_data mt2712_data = { @@ -130,6 +134,29 @@ static const struct mtk_wdt_data mt8195_data = { .toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM, }; +static const u8 mt8167_toprgu_sw_rst_tb[] = { + [MT8167_TOPRGU_DDRPHY_FLASH_RST] = 0, + [MT8167_TOPRGU_AUD_PAD_RST] = 1, + [MT8167_TOPRGU_MM_RST] = 2, + [MT8167_TOPRGU_MFG_RST] = 3, + [MT8167_TOPRGU_MDSYS_RST] = 4, + [MT8167_TOPRGU_CONN_RST] = 5, + [MT8167_TOPRGU_PAD2CAM_DIG_MIPI_RX_RST] = 6, + [MT8167_TOPRGU_DIG_MIPI_TX_RST] = 7, + [MT8167_TOPRGU_SPI_PAD_MACRO_RST] = 8, + /* The data sheet describes bit 9 as "reserved, unused" */ + [MT8167_TOPRGU_APMIXED_RST] = 10, + [MT8167_TOPRGU_VDEC_RST] = 11, + [MT8167_TOPRGU_CONN_MCU_RST] = 12, + [MT8167_TOPRGU_EFUSE_RST] = 13, + [MT8167_TOPRGU_PWRAP_SPICTL_RST] = 14 +}; + +static const struct mtk_wdt_data mt8167_data = { + .toprgu_sw_rst_tb = mt8167_toprgu_sw_rst_tb, + .toprgu_sw_rst_num = ARRAY_SIZE(mt8167_toprgu_sw_rst_tb), +}; + /** * toprgu_reset_sw_en_unlocked() - enable/disable software control for reset bit * @data: Pointer to instance of driver data. @@ -160,6 +187,15 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev, struct mtk_wdt_dev *data = container_of(rcdev, struct mtk_wdt_dev, rcdev); + if (data->toprgu_sw_rst_tb) { + if (id >= data->toprgu_sw_rst_num) { + dev_err(rcdev->dev, "Invalid reset ID: %lu (>=%u)\n", + id, data->toprgu_sw_rst_num); + return -EINVAL; + } + id = data->toprgu_sw_rst_tb[id]; + } + spin_lock_irqsave(&data->lock, flags); if (assert && data->has_swsysrst_en) @@ -457,12 +493,14 @@ static int mtk_wdt_probe(struct platform_device *pdev) wdt_data = of_device_get_match_data(dev); if (wdt_data) { + mtk_wdt->toprgu_sw_rst_num = wdt_data->toprgu_sw_rst_num; + mtk_wdt->toprgu_sw_rst_tb = wdt_data->toprgu_sw_rst_tb; + mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en; + err = toprgu_register_reset_controller(pdev, wdt_data->toprgu_sw_rst_num); if (err) return err; - - mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en; } mtk_wdt->disable_wdt_extrst = @@ -503,6 +541,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = { { .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data }, { .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data }, { .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data }, + { .compatible = "mediatek,mt8167-wdt", .data = &mt8167_data }, { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data }, { .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data }, { .compatible = "mediatek,mt8188-wdt", .data = &mt8188_data }, -- 2.43.0