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Fri, 11 Sep 2026 23:40:54 -0700 (PDT) Received: from [192.168.18.164] ([2600:8804:5716:d800::b712]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-803f670ec82sm4932735a34.20.2026.09.11.23.40.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 23:40:53 -0700 (PDT) From: Ryan Brue Subject: [PATCH 0/2] clk: mediatek: Fix FHCTL DDS mask widths for mt8173, mt6795 Date: Sat, 12 Sep 2026 01:40:36 -0500 Message-Id: <20260912-mt8173-fix-dds-mask-width-v1-0-3d0c0292c85c@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXMyw6CQAyF4VchXduEjmZAX8WwgGmBakAzHS8J4 d0dYfkl5/wLmEQVg0uxQJS3mj7mDDoUEMZ2HgSVs8GVzpdncjilmqoj9vpFZsOptTt+lNOIPnQ VBd/LiQny/xklr7b2tdltr+4mIf2DsK4/qaqIzX0AAAA= X-Change-ID: 20260912-mt8173-fix-dds-mask-width-6cb71c6fe4d1 To: Stephen Boyd , Brian Masney , Jerome Brunet , Matthias Brugger , AngeloGioacchino Del Regno , Chen-Yu Tsai Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Ryan Brue X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789195251; l=1557; i=ryanbrue.dev@gmail.com; s=20260906; h=from:subject:message-id; bh=Zt1FOqW2KqdoRYXtktantBzoTQDsX3R4Zq/f08ZKesg=; b=f+gU2KPV4GL3RlxKjra3EBgbSRpjeS0ghAYC7hkFJHSavKdwLttmPfViyyZOeMjxCFe3rP57A +UtDJosJl5FDBkDh1Pme7YytT+JN9WWHnOdfvJLKSqQ3pYoiBiSGLRM X-Developer-Key: i=ryanbrue.dev@gmail.com; a=ed25519; pk=KsUvVaP//v/2q+ZBuacc7cLbsyEYn+AD71Sn28oZWKo= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260911_234056_740836_16BCE117 X-CRM114-Status: GOOD ( 13.06 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Discovered this while working on bringup for the Amazon Fire HD 10 (2017). In f222a1baec5f ("clk: mediatek: mt6795: Add support for frequency hopping through FHCTL"), and 45a5cbe05d1f ("clk: mediatek: mt8173: Add support for frequency hopping through FHCTL"), the DDS masks were set to the same GENMASK(21, 0) as mt8186, mt8192, and mt8195, despite not having the same pcwbits (21 as opposed to 22). These two patches correct that. Tested on an Amazon Fire HD 10 (2017), an mt8173 tablet, across 6 MMPLL rate changes. All of them timed out prior to this patchset, and all of them succeed with the patchset. mt8173 currently doesn't use FHCTL, but this will correct it for the future in case it does get used. I do not have an mt6795 to test with, but mt6795-sony-xperia-m5.dts is an actual consumer of the FHCTL node, and switches it on for mainpll, mpll and msdcpll. If someone has that device to test the second patch, that would be appreciated. I do believe this is the correct fix though regardless. Signed-off-by: Ryan Brue --- Ryan Brue (2): clk: mediatek: mt8173: fix the FHCTL DDS mask width clk: mediatek: mt6795: fix the FHCTL DDS mask width drivers/clk/mediatek/clk-mt6795-apmixedsys.c | 2 +- drivers/clk/mediatek/clk-mt8173-apmixedsys.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) --- base-commit: df2908090cda368b01ff43709f51890076c56157 change-id: 20260912-mt8173-fix-dds-mask-width-6cb71c6fe4d1 Best regards, -- Ryan Brue