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Tue, 20 Oct 2026 10:38:01 -0700 (PDT) Received: from luca-vm.lan ([154.61.61.58]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1f8016c93sm52505235e9.5.2026.10.20.10.38.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Oct 2026 10:38:01 -0700 (PDT) From: Luca Leonardo Scorcia To: linux-mediatek@lists.infradead.org Cc: Luca Leonardo Scorcia , AngeloGioacchino Del Regno , Dmitry Torokhov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sen Chu , Sean Wang , Macpaul Lin , Lee Jones , Matthias Brugger , Liam Girdwood , Mark Brown , Linus Walleij , Val Packett , Fabien Parent , Akari Tsuyukusa , Chen Zhong , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, mfd@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org Subject: [PATCH RESEND v10 7/9] pinctrl: mediatek: mt6397: Add MediaTek MT6392 Date: Tue, 20 Oct 2026 19:33:28 +0200 Message-ID: <20261020173556.632798-8-l.scorcia@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261020173556.632798-1-l.scorcia@gmail.com> References: <20261020173556.632798-1-l.scorcia@gmail.com> X-Archived-By: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261020_103804_195733_BF517F81 X-CRM114-Status: GOOD ( 19.53 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Add support for the MT6392 pinctrl device, which is very similar to MT6397 with a handful of different property values and its own pins definition. Update the MT6397 driver to retrieve device data from the match table and use it for driver init. Signed-off-by: Luca Leonardo Scorcia Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/pinctrl-mt6397.c | 37 ++++++++++- drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h | 64 +++++++++++++++++++ 2 files changed, 99 insertions(+), 2 deletions(-) create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6397.c b/drivers/pinctrl/mediatek/pinctrl-mt6397.c index 13cee2a209c2..3944e39db7e6 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6397.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6397.c @@ -12,10 +12,32 @@ #include #include "pinctrl-mtk-common.h" +#include "pinctrl-mtk-mt6392.h" #include "pinctrl-mtk-mt6397.h" #define MT6397_PIN_REG_BASE 0xc000 +static const struct mtk_pinctrl_devdata mt6392_pinctrl_data = { + .pins = mtk_pins_mt6392, + .npins = ARRAY_SIZE(mtk_pins_mt6392), + .dir_offset = (MT6397_PIN_REG_BASE + 0x000), + .ies_offset = MTK_PINCTRL_NOT_SUPPORT, + .smt_offset = MTK_PINCTRL_NOT_SUPPORT, + .pullen_offset = (MT6397_PIN_REG_BASE + 0x020), + .pullsel_offset = (MT6397_PIN_REG_BASE + 0x040), + .dout_offset = (MT6397_PIN_REG_BASE + 0x080), + .din_offset = (MT6397_PIN_REG_BASE + 0x0a0), + .pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0), + .type1_start = 7, + .type1_end = 7, + .port_shf = 3, + .port_mask = 0x3, + .port_align = 2, + .mode_mask = 0xf, + .mode_per_reg = 5, + .mode_shf = 4, +}; + static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = { .pins = mtk_pins_mt6397, .npins = ARRAY_SIZE(mtk_pins_mt6397), @@ -40,13 +62,24 @@ static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = { static int mt6397_pinctrl_probe(struct platform_device *pdev) { struct mt6397_chip *mt6397; + const struct mtk_pinctrl_devdata *data; + + data = device_get_match_data(&pdev->dev); + if (!data) + return -ENOENT; mt6397 = dev_get_drvdata(pdev->dev.parent); - return mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap); + return mtk_pctrl_init(pdev, data, mt6397->regmap); } static const struct of_device_id mt6397_pctrl_match[] = { - { .compatible = "mediatek,mt6397-pinctrl", }, + { + .compatible = "mediatek,mt6392-pinctrl", + .data = &mt6392_pinctrl_data + }, { + .compatible = "mediatek,mt6397-pinctrl", + .data = &mt6397_pinctrl_data + }, { } }; MODULE_DEVICE_TABLE(of, mt6397_pctrl_match); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h new file mode 100644 index 000000000000..e7241af28fdb --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6392.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __PINCTRL_MTK_MT6392_H +#define __PINCTRL_MTK_MT6392_H + +#include +#include "pinctrl-mtk-common.h" + +static const struct mtk_desc_pin mtk_pins_mt6392[] = { + MTK_PIN(PINCTRL_PIN(0, "INT"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO0"), + MTK_FUNCTION(1, "INT"), + MTK_FUNCTION(5, "TEST_CK2"), + MTK_FUNCTION(6, "TEST_IN1"), + MTK_FUNCTION(7, "TEST_OUT1") + ), + MTK_PIN(PINCTRL_PIN(1, "SRCLKEN"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO1"), + MTK_FUNCTION(1, "SRCLKEN"), + MTK_FUNCTION(5, "TEST_CK0"), + MTK_FUNCTION(6, "TEST_IN2"), + MTK_FUNCTION(7, "TEST_OUT2") + ), + MTK_PIN(PINCTRL_PIN(2, "RTC_32K1V8"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO2"), + MTK_FUNCTION(1, "RTC_32K1V8"), + MTK_FUNCTION(5, "TEST_CK1"), + MTK_FUNCTION(6, "TEST_IN3"), + MTK_FUNCTION(7, "TEST_OUT3") + ), + MTK_PIN(PINCTRL_PIN(3, "SPI_CLK"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO3"), + MTK_FUNCTION(1, "SPI_CLK") + ), + MTK_PIN(PINCTRL_PIN(4, "SPI_CSN"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO4"), + MTK_FUNCTION(1, "SPI_CSN") + ), + MTK_PIN(PINCTRL_PIN(5, "SPI_MOSI"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO5"), + MTK_FUNCTION(1, "SPI_MOSI") + ), + MTK_PIN(PINCTRL_PIN(6, "SPI_MISO"), + NULL, "mt6392", + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT), + MTK_FUNCTION(0, "GPIO6"), + MTK_FUNCTION(1, "SPI_MISO"), + MTK_FUNCTION(6, "TEST_IN4"), + MTK_FUNCTION(7, "TEST_OUT4") + ), +}; + +#endif /* __PINCTRL_MTK_MT6392_H */ -- 2.43.0