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Mon, 18 Mar 2024 08:38:59 -0700 (PDT) Received: from [10.67.48.245] ([192.19.223.252]) by smtp.googlemail.com with ESMTPSA id q98-20020a17090a17eb00b0029e077a9fe6sm5870067pja.27.2024.03.18.08.38.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 Mar 2024 08:38:58 -0700 (PDT) Message-ID: <23f4c9b1-5c6b-4f3c-9290-41d195650368@gmail.com> Date: Mon, 18 Mar 2024 08:38:57 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] arm64: dts: mediatek: mt7622: set PHY address of MT7531 switch to 0x1f Content-Language: en-US To: =?UTF-8?B?QXLEsW7DpyDDnE5BTA==?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org References: <20240314-for-mediatek-mt7531-phy-address-v1-0-52f58db01acd@arinc9.com> <20240314-for-mediatek-mt7531-phy-address-v1-1-52f58db01acd@arinc9.com> <94e3d09a-e6a4-4808-bc29-3f494b65e170@gmail.com> <62d128f1-11ac-4669-90ff-e9cdd0ec5bd9@arinc9.com> <71dd200a-0306-4baa-abab-6e6906aeef2a@gmail.com> <7d1ad037-d8ac-4b9a-b6d2-ab683e52a898@arinc9.com> From: Florian Fainelli In-Reply-To: <7d1ad037-d8ac-4b9a-b6d2-ab683e52a898@arinc9.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240318_083901_410073_0FA4551D X-CRM114-Status: GOOD ( 15.14 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On 3/18/24 08:26, Arınç ÜNAL wrote: > On 18.03.2024 16:02, Florian Fainelli wrote: >>>> Can we call it a pseudo PHY to use a similar terminology as what is >>>> done through drivers/net/dsa/{bcm_sf2,b53}*? >>>> >>>> This is not a real PHY as in it has no actual transceiver/digital >>>> signal processing logic, this is a piece of logic that snoops for >>>> MDIO transactions at that specific address and lets you access the >>>> switch's internal register as if it was a MDIO device. >>> >>> I can get behind calling the switch a psuedo-PHY in the context of MDIO. >>> However, as described on "22.2.4.5.5 PHYAD (PHY Address)" of "22.2.4.5 >>> Management frame structure" of the active standard IEEE Std 802.3™‐2022, >>> the field is called "PHY Address". The patch log doesn't give an >>> identifier >>> as to what a switch is in the context of MDIO. Only that it listens on a >>> certain PHY address which the term complies with IEEE Std 802.3™‐2022. >>> >>> So I don't see an improvement to be made on the patch log. Feel free to >>> elaborate further. >> >> I would just s/PHY/MDIO bus address/ since that is simply more >> generic, but if it is not written as-is in the spec, then I won't >> fight it much more than I already did. > > I'm not sure what you're referring to by spec. Are you asking how specific > the name of the PHYAD field is described on the standard? Spec = IEEE Std 802.3-2022 standard, aka the document you are quoting. -- Florian