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Mon, 17 Aug 2026 09:52:37 +0000 X-Migadu-Flow: FLOW_OUT Message-ID: <29a29de8-ce58-40d5-9161-5ac36b7368c1@linux.dev> Date: Mon, 17 Aug 2026 17:52:31 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8] net: airoha: npu: use cacheline-sized buffers for mailbox DMA To: Daniel Pawlik , netdev@vger.kernel.org Cc: lorenzo@kernel.org, win847@gmail.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org References: <20260817090601.1256389-1-pawlik.dan@gmail.com> From: Qingfang Deng In-Reply-To: <20260817090601.1256389-1-pawlik.dan@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260817_025242_298928_BC964B7C X-CRM114-Status: GOOD ( 17.44 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi, On 2026/8/17 17:06, Daniel Pawlik wrote: > On EN7581 + MT7996 (Gemtek W1700K), mapping small caller buffers with > DMA_BIDIRECTIONAL regresses NPU version probe: the mailbox completes > successfully but WLAN_FUNC_GET_WAIT_NPU_VERSION reads as 0.0 instead of > 0.1111. > > Allocate at least SMP_CACHE_BYTES for each mailbox payload and map > ALIGN(len, SMP_CACHE_BYTES) with DMA_BIDIRECTIONAL while programming > the original payload length into the mailbox length register. > > Tested on Quantum Fiber / Gemtek W1700K (EN7581 + MT7996), kernel > 6.18.44, including two cold reboots and sustained WiFi use. > > Fixes: 6f884eb87a79 ("net: airoha: Fix DMA direction for NPU mailbox buffer") > Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20260814110017.2795022-1-pawlik.dan@gmail.com/ > Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20260809152813.585797-1-pawlik.dan@gmail.com/ > Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20260805070851.2885888-1-pawlik.dan@gmail.com/ > Assisted-by: Cursor:composer-2 > Signed-off-by: Daniel Pawlik > --- > drivers/net/ethernet/airoha/airoha_npu.c | 25 +++++++++++++++--------- > 1 file changed, 16 insertions(+), 9 deletions(-) > > -- > 2.55.0 > > diff --git a/drivers/net/ethernet/airoha/airoha_npu.c b/drivers/net/ethernet/airoha/airoha_npu.c > index b679bed952de..d560b8763753 100644 > --- a/drivers/net/ethernet/airoha/airoha_npu.c > +++ b/drivers/net/ethernet/airoha/airoha_npu.c > @@ -5,6 +5,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -160,15 +161,21 @@ struct wlan_mbox_data { > DECLARE_FLEX_ARRAY(u8, d); > }; > > +static size_t airoha_npu_mbox_size(size_t len) > +{ > + return ALIGN(max(len, SMP_CACHE_BYTES), SMP_CACHE_BYTES); SMP_CACHE_BYTES defaults to L1_CACHE_BYTES on Aarch64. On Cortex-A53 this is fine, but some CPU's L2 cache line size might differ. For portability, please use dma_get_cache_alignment() instead. Also "max" is redundant. > +} > + > static int airoha_npu_send_msg(struct airoha_npu *npu, int func_id, > void *p, int size) > { > u16 core = 0; /* FIXME */ > u32 val, offset = core << 4; > dma_addr_t dma_addr; > + size_t map_len = airoha_npu_mbox_size(size); > int ret; > > - dma_addr = dma_map_single(npu->dev, p, size, DMA_BIDIRECTIONAL); > + dma_addr = dma_map_single(npu->dev, p, map_len, DMA_BIDIRECTIONAL); You don't have to align the size passed to DMA API. The underlying implementation already aligns it. > ret = dma_mapping_error(npu->dev, dma_addr); > if (ret) > return ret; > @@ -191,7 +198,7 @@ static int airoha_npu_send_msg(struct airoha_npu *npu, int func_id, > > spin_unlock_bh(&npu->cores[core].lock); > > - dma_unmap_single(npu->dev, dma_addr, size, DMA_BIDIRECTIONAL); > + dma_unmap_single(npu->dev, dma_addr, map_len, DMA_BIDIRECTIONAL); > > return ret; > } Best regards, Qingfang