Re: [PATCH v7 03/13] soc: mediatek: Refactor polling timeout and documentation

[Matthias Brugger <matthias.bgg@gmail.com>]

On 28/08/2019 11:11, Weiyi Lu wrote:
> Use USEC_PER_SEC to indicate the polling timeout directly.
> And add documentation of scp_domain_data.
> 
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> ---

Queued for v5.4-next/soc
Thanks!

>  drivers/soc/mediatek/mtk-scpsys.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
> index 503222d..e97fc0e 100644
> --- a/drivers/soc/mediatek/mtk-scpsys.c
> +++ b/drivers/soc/mediatek/mtk-scpsys.c
> @@ -21,7 +21,7 @@
>  #include <dt-bindings/power/mt8173-power.h>
>  
>  #define MTK_POLL_DELAY_US   10
> -#define MTK_POLL_TIMEOUT    (jiffies_to_usecs(HZ))
> +#define MTK_POLL_TIMEOUT    USEC_PER_SEC
>  
>  #define MTK_SCPD_ACTIVE_WAKEUP		BIT(0)
>  #define MTK_SCPD_FWAIT_SRAM		BIT(1)
> @@ -108,6 +108,17 @@ enum clk_id {
>  
>  #define MAX_CLKS	3
>  
> +/**
> + * struct scp_domain_data - scp domain data for power on/off flow
> + * @name: The domain name.
> + * @sta_mask: The mask for power on/off status bit.
> + * @ctl_offs: The offset for main power control register.
> + * @sram_pdn_bits: The mask for sram power control bits.
> + * @sram_pdn_ack_bits: The mask for sram power control acked bits.
> + * @bus_prot_mask: The mask for single step bus protection.
> + * @clk_id: The basic clocks required by this power domain.
> + * @caps: The flag for active wake-up action.
> + */
>  struct scp_domain_data {
>  	const char *name;
>  	u32 sta_mask;
>