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From: "Darren Ye (叶飞)" <Darren.Ye@mediatek.com>
To: "wenst@chromium.org" <wenst@chromium.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linus.walleij@linaro.org" <linus.walleij@linaro.org>,
	"linux-sound@vger.kernel.org" <linux-sound@vger.kernel.org>,
	"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
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	"brgl@bgdev.pl" <brgl@bgdev.pl>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"tiwai@suse.com" <tiwai@suse.com>,
	"robh@kernel.org" <robh@kernel.org>,
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	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"perex@perex.cz" <perex@perex.cz>
Subject: Re: [PATCH v3 03/10] ASoC: mediatek: mt8196: support audio clock control
Date: Thu, 15 May 2025 09:31:35 +0000	[thread overview]
Message-ID: <5556933f34858b50e5077dee62d430fc9a37f74b.camel@mediatek.com> (raw)
In-Reply-To: <CAGXv+5Hj358gOBomY=KdwYojgpwxFP-tiM38Z18b63ie=922mg@mail.gmail.com>

On Thu, 2025-05-15 at 16:50 +0800, Chen-Yu Tsai wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> On Thu, May 15, 2025 at 4:40 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
> > 
> > Il 14/05/25 10:11, Darren.Ye ha scritto:
> > > From: Darren Ye <darren.ye@mediatek.com>
> > > 
> > > Add audio clock wrapper and audio tuner control.
> > > 
> > > Signed-off-by: Darren Ye <darren.ye@mediatek.com>
> > > ---
> > >   sound/soc/mediatek/mt8196/mt8196-afe-clk.c    | 723
> > > ++++++++++++++++++
> > >   sound/soc/mediatek/mt8196/mt8196-afe-clk.h    | 142 ++++
> > >   sound/soc/mediatek/mt8196/mt8196-audsys-clk.c | 252 ++++++
> > >   sound/soc/mediatek/mt8196/mt8196-audsys-clk.h |  14 +
> > >   .../soc/mediatek/mt8196/mt8196-audsys-clkid.h |  78 ++
> > >   5 files changed, 1209 insertions(+)
> > >   create mode 100644 sound/soc/mediatek/mt8196/mt8196-afe-clk.c
> > >   create mode 100644 sound/soc/mediatek/mt8196/mt8196-afe-clk.h
> > >   create mode 100644 sound/soc/mediatek/mt8196/mt8196-audsys-
> > > clk.c
> > >   create mode 100644 sound/soc/mediatek/mt8196/mt8196-audsys-
> > > clk.h
> > >   create mode 100644 sound/soc/mediatek/mt8196/mt8196-audsys-
> > > clkid.h
> > > 
> > > diff --git a/sound/soc/mediatek/mt8196/mt8196-afe-clk.c
> > > b/sound/soc/mediatek/mt8196/mt8196-afe-clk.c
> > > new file mode 100644
> > > index 000000000000..83b5ee9d30ef
> > > --- /dev/null
> > > +++ b/sound/soc/mediatek/mt8196/mt8196-afe-clk.c
> > > @@ -0,0 +1,723 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + *  mt8196-afe-clk.c  --  Mediatek 8196 afe clock ctrl
> > 
> > mt8196-afe-clk.c - MediaTek MT8196 AFE Clock Control
> > 
> > > + *
> > > + *  Copyright (c) 2024 MediaTek Inc.
> > > + *  Author: Darren Ye <darren.ye@mediatek.com>
> > > + */
> > > +
> > > +#include <linux/clk.h>
> > > +#include <linux/regmap.h>
> > > +#include <linux/mfd/syscon.h>
> > > +#include "mt8196-afe-common.h"
> > > +#include "mt8196-audsys-clk.h"
> > > +#include "mt8196-afe-clk.h"
> > > +
> > 
> > > +int mt8196_audsys_clk_register(struct mtk_base_afe *afe)
> > > +{
> > > +     struct mt8196_afe_private *afe_priv = afe->platform_priv;
> > > +     struct clk *clk;
> > > +     struct clk_lookup *cl;
> > > +     int i;
> > > +
> > > +     afe_priv->lookup = devm_kcalloc(afe->dev, CLK_AFE_NR_CLK,
> > > +                                     sizeof(*afe_priv->lookup),
> > > +                                     GFP_KERNEL);
> > > +
> > > +     if (!afe_priv->lookup)
> > > +             return -ENOMEM;
> > > +
> > > +     for (i = 0; i < ARRAY_SIZE(aud_clks); i++) {
> > > +             const struct afe_gate *gate = &aud_clks[i];
> > > +
> > > +             clk = clk_register_gate(afe->dev, gate->name, gate-
> > > >parent_name,
> > > +                                     gate->flags, afe->base_addr 
> > > + gate->reg,
> > > +                                     gate->bit, gate->cg_flags,
> > > NULL);
> > > +
> > > +             if (IS_ERR(clk)) {
> > > +                     dev_err(afe->dev, "Failed to register clk
> > > %s: %ld\n",
> > > +                             gate->name, PTR_ERR(clk));
> > > +                     continue;
> > > +             }
> > > +
> > 
> > All of the above, until...
> > 
> > > +             /* add clk_lookup for
> > > devm_clk_get(SND_SOC_DAPM_CLOCK_SUPPLY) */
> > > +             cl = kzalloc(sizeof(*cl), GFP_KERNEL);
> > > +             if (!cl)
> > > +                     return -ENOMEM;
> > > +
> > > +             cl->clk = clk;
> > > +             cl->con_id = gate->name;
> > > +             cl->dev_id = dev_name(afe->dev);
> > > +             cl->clk_hw = NULL;
> > > +             clkdev_add(cl);
> > 
> > 
> > ...here, can be simplified with a single call to
> > 
> > clk_register_clkdev(clk, gate->name, dev_name(afe->dev))
> > 
> > or alternatively, you could simplify it even more:
> > 
> > 
> > static void mt8196_audsys_clk_unregister(void *data)
> > {
> >         /* nothing to do here, remove this function */
> > }
> > 
> > int mt8196_audsys_clk_register(struct mtk_base_afe *afe)
> > {
> >         struct mt8196_afe_private *afe_priv = afe->platform_priv;
> >         int i, ret;
> > 
> >         for (i = 0; i < ARRAY_SIZE(aud_clks); i++) {
> >                 const struct afe_gate *gate = &aud_clks[i];
> >                 struct clk_hw *hw;
> > 
> >                 hw = devm_clk_hw_register_gate(afe->dev, gate-
> > >name, gate->parent_name,
> >                                                gate->flags, afe-
> > >base_addr + gate->reg,
> >                                                gate->bit, gate-
> > >cg_flags, NULL);
> >                 if (IS_ERR(clk)) {
> >                         dev_err(afe->dev, "Failed to register clk
> > %s: %ld\n",
> >                                 gate->name, PTR_ERR(clk));
> >                         continue;
> >                 }
> > 
> >                 ret = devm_clk_hw_register_clkdev(afe->dev, hw,
> > gate->name, dev_name(afe->dev));
> >                 if (ret)
> >                         return ret;
> >         }
> > 
> >         return 0;
> > }
> 
> There is no need to involve the clk subsystem. These are simply
> supply
> gates, be them for power or clks, one per bit. Simply model them as
> ASoC
> supply widgets, add appropriate routes for each so that the
> dependencies
> are correct, and ASoC will deal with them for you. No code is needed,
> just descriptions.
> 
> _That_ is why I asked for he audio clocks to be integrated into the
> AFE driver.
> 
> ChenYu
> 

OK, I misunderstood. The next version will use widgets and route to
control the afe clk gate.

Best regards,
Darren

> > > +
> > > +             afe_priv->lookup[i] = cl;
> > > +     }
> > > +
> > > +     return devm_add_action_or_reset(afe->dev,
> > > mt8196_audsys_clk_unregister, afe);
> > > +}
> > 
> > Cheers,
> > Angelo
> > 

  parent reply	other threads:[~2025-05-15  9:43 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-14  8:11 [PATCH v3 00/10] ASoC: mediatek: Add support for MT8196 SoC Darren.Ye
2025-05-14  8:11 ` [PATCH v3 01/10] ASoC: mediatek: common: modify mtk afe platform driver for mt8196 Darren.Ye
2025-05-14  8:11 ` [PATCH v3 02/10] ASoC: mediatek: mt8196: add common header Darren.Ye
2025-05-14  8:11 ` [PATCH v3 03/10] ASoC: mediatek: mt8196: support audio clock control Darren.Ye
2025-05-15  8:30   ` AngeloGioacchino Del Regno
2025-05-15  8:50     ` Chen-Yu Tsai
2025-05-15  8:54       ` Mark Brown
2025-05-15  9:31       ` Darren Ye (叶飞) [this message]
2025-05-14  8:11 ` [PATCH v3 04/10] ASoC: mediatek: mt8196: support ADDA in platform driver Darren.Ye
2025-05-14  8:17   ` Mark Brown
2025-05-14  8:58     ` Darren Ye (叶飞)
2025-05-14  8:11 ` [PATCH v3 05/10] ASoC: mediatek: mt8196: support I2S " Darren.Ye
2025-05-14  8:11 ` [PATCH v3 06/10] ASoC: mediatek: mt8196: support TDM " Darren.Ye
2025-05-14  8:11 ` [PATCH v3 07/10] ASoC: mediatek: mt8196: add " Darren.Ye
2025-05-15  4:41   ` kernel test robot
2025-05-14  8:11 ` [PATCH v3 08/10] ASoC: dt-bindings: mediatek,mt8196-afe: add audio AFE document Darren.Ye
2025-05-14 10:54   ` Krzysztof Kozlowski
2025-05-15  3:57     ` Darren Ye (叶飞)
2025-06-11  9:32     ` Krzysztof Kozlowski
2025-06-11 13:05       ` Darren Ye (叶飞)
2025-05-14  8:11 ` [PATCH v3 09/10] ASoC: mediatek: mt8196: add machine driver with nau8825 Darren.Ye
2025-05-15  7:27   ` kernel test robot
2025-05-14  8:11 ` [PATCH v3 10/10] ASoC: dt-bindings: mediatek,mt8196-nau8825: add mt8196-nau8825 document Darren.Ye
2025-05-14 10:51   ` Krzysztof Kozlowski
2025-05-15  3:50     ` Darren Ye (叶飞)

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