From: Shawn Lin <shawn.lin@rock-chips.com>
To: Sharp.Xia@mediatek.com
Cc: shawn.lin@rock-chips.com,
angelogioacchino.delregno@collabora.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-mmc@vger.kernel.org, matthias.bgg@gmail.com,
ulf.hansson@linaro.org, wsd_upstream@mediatek.com
Subject: Re: [PATCH 1/1] mmc: Set optimal I/O size when mmc_setip_queue
Date: Fri, 25 Aug 2023 17:17:34 +0800 [thread overview]
Message-ID: <769a67cb-1b32-fd4f-b37e-e3ec4dab5eb9@rock-chips.com> (raw)
In-Reply-To: <20230825083918.24334-1-Sharp.Xia@mediatek.com>
On 2023/8/25 16:39, Sharp.Xia@mediatek.com wrote:
> On Fri, 2023-08-25 at 16:11 +0800, Shawn Lin wrote:
>>
>> Hi Sharp,
...
>>> 1024
>>>
> Hi Shawn,
>
> What is your readahead value before and after applying this patch?
>
The original readahead is 128, and after applying the patch is 1024
cat /d/mmc0/ios
clock: 200000000 Hz
actual clock: 200000000 Hz
vdd: 18 (3.0 ~ 3.1 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 10 (mmc HS400 enhanced strobe)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
The driver I used is sdhci-of-dwcmshc.c with a KLMBG2JETDB041 eMMC chip.
next prev parent reply other threads:[~2023-08-25 9:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-18 2:28 [PATCH 1/1] mmc: Set optimal I/O size when mmc_setip_queue Sharp.Xia
2023-08-24 10:55 ` Ulf Hansson
2023-08-25 7:10 ` Sharp Xia (夏宇彬)
2023-08-25 8:11 ` Shawn Lin
2023-08-25 8:39 ` Sharp.Xia
2023-08-25 9:17 ` Shawn Lin [this message]
2023-08-26 16:26 ` Sharp.Xia
2023-08-28 2:27 ` Shawn Lin
2023-08-28 9:04 ` Ulf Hansson
2023-08-25 12:23 ` Wenchao Chen
2023-08-26 16:54 ` Sharp.Xia
2023-08-25 7:25 ` Sharp.Xia
2023-08-25 7:26 ` Sharp.Xia
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