From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Alexandre Mergnat <amergnat@baylibre.com>,
Rob Herring <robh+dt@kernel.org>, Yong Wu <yong.wu@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>, Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Fabien Parent <fparent@baylibre.com>,
Markus Schneider-Pargmann <msp@baylibre.com>,
Amjad Ouled-Ameur <aouledameur@baylibre.com>,
devicetree@vger.kernel.org, iommu@lists.linux.dev
Subject: Re: [PATCH v2 2/3] iommu/mediatek: add support for 6-bit encoded port IDs
Date: Tue, 4 Oct 2022 13:59:04 +0200 [thread overview]
Message-ID: <7d37e6ae-0dca-e0ef-2841-298c1ba9784f@collabora.com> (raw)
In-Reply-To: <20221001-iommu-support-v2-2-dbfef2eeebc9@baylibre.com>
Il 04/10/22 12:01, Alexandre Mergnat ha scritto:
> From: Fabien Parent <fparent@baylibre.com>
>
> Until now the port ID was always encoded as a 5-bit data. On MT8365,
> the port ID is encoded as a 6-bit data. This requires to rework the
> macros F_MMU_INT_ID_LARB_ID, and F_MMU_INT_ID_PORT_ID in order
> to support 5-bit and 6-bit encoded port IDs.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
> ---
> drivers/iommu/mtk_iommu.c | 24 ++++++++++++++++++++----
> 1 file changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index 5a4e00e4bbbc..a57ce509c8b5 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -108,8 +108,10 @@
> #define F_MMU_INT_ID_SUB_COMM_ID(a) (((a) >> 7) & 0x3)
> #define F_MMU_INT_ID_COMM_ID_EXT(a) (((a) >> 10) & 0x7)
> #define F_MMU_INT_ID_SUB_COMM_ID_EXT(a) (((a) >> 7) & 0x7)
> -#define F_MMU_INT_ID_LARB_ID(a) (((a) >> 7) & 0x7)
> -#define F_MMU_INT_ID_PORT_ID(a) (((a) >> 2) & 0x1f)
> +#define F_MMU_INT_ID_LARB_ID(a, int_id_port_width) \
> + ((a) >> (((int_id_port_width) + 2) & 0x7))
> +#define F_MMU_INT_ID_PORT_ID(a, int_id_port_width) \
> + (((a) >> 2) & GENMASK((int_id_port_width) - 1, 0))
I can't think about any cleaner way than this one, but that's decreasing human
readability by "quite a bit".
The only way you can keep it readable is by adding a comment before these macros
that explains the sub-fields of FAULT_ID, located in the INT_ID register: please
add that.
Regards,
Angelo
next prev parent reply other threads:[~2022-10-04 11:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-04 10:01 [PATCH v2 0/3] iommu/mediatek: Add mt8365 iommu support Alexandre Mergnat
2022-10-04 10:01 ` [PATCH v2 1/3] dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC Alexandre Mergnat
2022-10-04 12:01 ` AngeloGioacchino Del Regno
2022-10-06 9:29 ` Markus Schneider-Pargmann
2022-10-04 10:01 ` [PATCH v2 2/3] iommu/mediatek: add support for 6-bit encoded port IDs Alexandre Mergnat
2022-10-04 11:59 ` AngeloGioacchino Del Regno [this message]
2022-10-06 10:46 ` Robin Murphy
2022-10-04 10:01 ` [PATCH v2 3/3] iommu/mediatek: add support for MT8365 SoC Alexandre Mergnat
2022-10-04 12:00 ` AngeloGioacchino Del Regno
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