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bh=ecA15Vx12iOuabOvm7sXXldy4x2qXzfYEVChnCDQANI=; b=XYwxPmQ+wJnQzV+UMPulA9KosXrbNo/2ixYwHVUorsDLTSG8nCW/N5wo3Y+QoCzLj/7QHW ++jGUmLig/U/drgmo3BxwZwVe3i9IYL+9/qZV1hPqrmGU9CRpPheBgyIQxPGYMotGN35Mb lEYQ0olAOmXMz59n7zaOGQ5a0gwNU4gdsXnzWYiOQAxqBJtVs5ZhDefOcf0DvWv7egh0VH D1Ppe5+IfUuf/ze55YYjH4nEKkNEvmEPJhg2GWqrsUXCJmZ+biMHAFBKm+L1Tv1QIJ5i+g xzN4Dntb/TMrSW8ffq97pIA0q8LLuvf3+21iw7HpE+b+T4QOvazSa70eU8sZJg== From: Gregory CLEMENT To: AngeloGioacchino Del Regno , krzk+dt@kernel.org Cc: herbert@gondor.apana.org.au, davem@davemloft.net, robh@kernel.org, conor+dt@kernel.org, andrew@lunn.ch, sebastian.hesselbarth@gmail.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, atenart@kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com Subject: Re: [PATCH v2 3/4] arm64: dts: marvell: Add SoC specific compatibles to SafeXcel crypto In-Reply-To: <20260112145558.54644-4-angelogioacchino.delregno@collabora.com> References: <20260112145558.54644-1-angelogioacchino.delregno@collabora.com> <20260112145558.54644-4-angelogioacchino.delregno@collabora.com> Date: Thu, 22 Jan 2026 10:28:01 +0100 Message-ID: <87ikcukndq.fsf@BLaptop.bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260122_012832_162616_0A02428E X-CRM114-Status: GOOD ( 11.81 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org AngeloGioacchino Del Regno writes: > Following the changes in the binding for the SafeXcel crypto > engine, add SoC specific compatibles to the existing nodes in > Armada 37xx and CP11x. > Applied on mvebu/dt64 Thanks, Gregory > Signed-off-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 3 ++- > arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/bo= ot/dts/marvell/armada-37xx.dtsi > index c612317043ea..87f9367aec12 100644 > --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > @@ -427,7 +427,8 @@ xor11 { > }; >=20=20 > crypto: crypto@90000 { > - compatible =3D "inside-secure,safexcel-eip97ies"; > + compatible =3D "marvell,armada-3700-crypto", > + "inside-secure,safexcel-eip97ies"; > reg =3D <0x90000 0x20000>; > interrupts =3D , > , > diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/b= oot/dts/marvell/armada-cp11x.dtsi > index d9d409eac259..39599171d51b 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi > @@ -512,7 +512,8 @@ CP11X_LABEL(sdhci0): mmc@780000 { > }; >=20=20 > CP11X_LABEL(crypto): crypto@800000 { > - compatible =3D "inside-secure,safexcel-eip197b"; > + compatible =3D "marvell,armada-cp110-crypto", > + "inside-secure,safexcel-eip197b"; > reg =3D <0x800000 0x200000>; > interrupts =3D <88 IRQ_TYPE_LEVEL_HIGH>, > <89 IRQ_TYPE_LEVEL_HIGH>, > --=20 > 2.52.0 > --=20 Gr=C3=A9gory CLEMENT, Bootlin Embedded Linux and Kernel engineering https://bootlin.com