From: Felix Fietkau <nbd@nbd.name>
To: JB Tsai <jb.tsai@mediatek.com>, lorenzo@kernel.org
Cc: linux-wireless@vger.kernel.org,
linux-mediatek@lists.infradead.org, Sean.Wang@mediatek.com,
Quan.Zhou@mediatek.com, Ryder.Lee@mediatek.com,
litien.chang@mediatek.com, Charlie-cy.Wu@mediatek.com
Subject: Re: [PATCH] wifi: mt76: mt7928: only do CLC hw type sanity check on MT7925
Date: Tue, 6 Oct 2026 17:40:15 +0200 [thread overview]
Message-ID: <8a070d0a-177f-41a3-bddf-0f8b06e82baa@nbd.name> (raw)
In-Reply-To: <20260909055750.929102-1-jb.tsai@mediatek.com>
On 09.09.26 07:57, JB Tsai wrote:
> From: Charlie-cy Wu <Charlie-cy.Wu@mediatek.com>
>
> mt7925_load_clc() is shared by MT7925, MT7927 and MT7928 (0x7935 is
> folded into 0x7928 in pci.c). The hw type sanity check it does on every
> CLC region is MT7925-specific twice over: the encap bits live at
> efuse offset MT_EE_HW_TYPE (0xa71) in the MT7925 layout, and only
> MT7925 CLC blobs carry that hw type in their t0/t2 header. On
> MT7927/MT7928 the driver therefore reads a byte that means nothing on
> those parts and compares it against a header field that was never
> populated, so a mismatch silently skips every CLC region and leaves
> phy->clc[] empty - no country/regd table gets installed at all.
>
> Gate both the efuse read and the two header checks on is_mt7925(), so
> MT7927/MT7928 accept the CLC regions from their own firmware as-is.
> No functional change for MT7925: PCIe still reads 0xa71 and filters by
> encap type, USB still runs with hw_encap = 0 as before.
>
> Fixes: 356b39285559 ("wifi: mt76: connac3: refactor CLC header type validation logic")
Patch doesn't apply, and I can't find the commit mentioned above.
- Felix
prev parent reply other threads:[~2026-10-06 15:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 5:57 [PATCH] wifi: mt76: mt7928: only do CLC hw type sanity check on MT7925 JB Tsai
2026-10-06 15:40 ` Felix Fietkau [this message]
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