Re: [PATCH v5,1/4] dt-bindings: pwm: Convert pwm-mtk-disp.txt to mediatek,pwm-disp.yaml format

[xinlei.lee <xinlei.lee@mediatek.com>]

On Fri, 2022-04-01 at 20:12 +0800, allen-kh.cheng wrote:
> Hi xinlei,
> 
> On Thu, 2022-03-31 at 20:47 +0800, xinlei.lee@mediatek.com wrote:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> > 
> > Convert pwm-mtk-disp.txt to mediatek,pwm-disp.yaml format as
> > suggested by maintainer
> > 
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> >  .../bindings/pwm/mediatek,pwm-disp.yaml       | 66
> > +++++++++++++++++++
> >  .../devicetree/bindings/pwm/pwm-mtk-disp.txt  | 45 -------------
> >  2 files changed, 66 insertions(+), 45 deletions(-)
> >  create mode 100644
> > Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
> >  delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-mtk-
> > disp.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-
> > disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-
> > disp.yaml
> > new file mode 100644
> > index 000000000000..36f877f819fa
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
> > @@ -0,0 +1,66 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek DISP_PWM Controller Device Tree Bindings
> > +
> > +maintainers:
> > +  - Jitao Shi <jitao.shi@mediatek.com>
> > +  - Xinlei Lee <xinlei.lee@mediatek.com>
> > +
> > +allOf:
> > +  - $ref: pwm.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    oneOf:
> > +      - enum:
> > +          - mediatek,mt2701-disp-pwm
> > +          - mediatek,mt6595-disp-pwm
> > +          - mediatek,mt8173-disp-pwm
> > +          - mediatek,mt8183-disp-pwm
> > +      - items:
> > +          - const: mediatek,mt8167-disp-pwm
> > +          - const: mediatek,mt8173-disp-pwm
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  "#pwm-cells":
> > +    const: 2
> > +
> > +  clocks:
> > +    items:
> > +      - description: Main Clock
> > +      - description: Mm Clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: main
> > +      - const: mm
> > +
> 
> Binding description is missing interrupt property [1]. 
> 
> Please add it for mt8192, thanks.
> 
> [1] 
> lore.kernel.org/all/51f8baea-6562-1d6b-c409-9c362f0b2fc5@gmail.com/
> 
> > +required:
> > +  - compatible
> > +  - reg
> > +  - "#pwm-cells"
> > +  - clocks
> > +  - clock-names
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/clock/mt8173-clk.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +    pwm0: pwm@1401e000 {
> > +        compatible = "mediatek,mt8173-disp-pwm";
> > +        reg = <0x1401e000 0x1000>;
> > +        #pwm-cells = <2>;
> > +        clocks = <&mmsys CLK_MM_DISP_PWM026M>,
> > +                 <&mmsys CLK_MM_DISP_PWM0MM>;
> > +        clock-names = "main", "mm";
> > +    };
> > diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> > b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> > deleted file mode 100644
> > index 691e58b6c223..000000000000
> > --- a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> > +++ /dev/null
> > @@ -1,45 +0,0 @@
> > -MediaTek display PWM controller
> > -
> > -Required properties:
> > - - compatible: should be "mediatek,<name>-disp-pwm":
> > -   - "mediatek,mt2701-disp-pwm": found on mt2701 SoC.
> > -   - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
> > -   - "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm": found
> > on mt8167 SoC.
> > -   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
> > -   - "mediatek,mt8183-disp-pwm": found on mt8183 SoC.$
> > - - reg: physical base address and length of the controller's
> > registers.
> > - - #pwm-cells: must be 2. See pwm.yaml in this directory for a
> > description of
> > -   the cell format.
> > - - clocks: phandle and clock specifier of the PWM reference clock.
> > - - clock-names: must contain the following:
> > -   - "main": clock used to generate PWM signals.
> > -   - "mm": sync signals from the modules of mmsys.
> > - - pinctrl-names: Must contain a "default" entry.
> > - - pinctrl-0: One property must exist for each entry in pinctrl-
> > names.
> > -   See pinctrl/pinctrl-bindings.txt for details of the property
> > values.
> > -
> > -Example:
> > -	pwm0: pwm@1401e000 {
> > -		compatible = "mediatek,mt8173-disp-pwm",
> > -			     "mediatek,mt6595-disp-pwm";
> > -		reg = <0 0x1401e000 0 0x1000>;
> > -		#pwm-cells = <2>;
> > -		clocks = <&mmsys CLK_MM_DISP_PWM026M>,
> > -			 <&mmsys CLK_MM_DISP_PWM0MM>;
> > -		clock-names = "main", "mm";
> > -		pinctrl-names = "default";
> > -		pinctrl-0 = <&disp_pwm0_pins>;
> > -	};
> > -
> > -	backlight_lcd: backlight_lcd {
> > -		compatible = "pwm-backlight";
> > -		pwms = <&pwm0 0 1000000>;
> > -		brightness-levels = <
> > -			  0  16  32  48  64  80  96 112
> > -			128 144 160 176 192 208 224 240
> > -			255
> > -		>;
> > -		default-brightness-level = <9>;
> > -		power-supply = <&mt6397_vio18_reg>;
> > -		enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
> > -	};
> 
> 

Hi Allen:

Thanks for your review, I will send the revised next version in the
near future.

Best Regards!
xinlei
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