From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
"Xinlei Lee (李昕磊)" <Xinlei.Lee@mediatek.com>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"daniel@ffwll.ch" <daniel@ffwll.ch>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"airlied@linux.ie" <airlied@linux.ie>,
"Rex-BC Chen (陳柏辰)" <Rex-BC.Chen@mediatek.com>,
"angelogioacchino.delregno@collabora.com"
<angelogioacchino.delregno@collabora.com>
Cc: "dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
"Jitao Shi (石记涛)" <jitao.shi@mediatek.com>
Subject: Re: [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186
Date: Fri, 23 Sep 2022 05:59:45 +0000 [thread overview]
Message-ID: <a137c801f5263abaef8a13a14a1f4b24a5bcdf1b.camel@mediatek.com> (raw)
In-Reply-To: <1663850702-26529-3-git-send-email-xinlei.lee@mediatek.com>
Hi, Xinlei:
From the code you modify, I do not understand why the title is "Adjust
the dpi output format to MT8186". You just call mmsys driver function
to set single edge or dual edge, but single edge or dual edge already
exist in other SoC and is not special in MT8186. So I think you should
change the title to 'Set dpi format in mmsys'
On Thu, 2022-09-22 at 20:45 +0800, xinlei.lee@mediatek.com wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Due to the mt8186 hardware changes, we need to modify the dpi
> output
> format corresponding to the mmsys register(mmsys_base+0x400).
>
The below description is not related to this patch and it's common with
mt8183, so I think we don't need below description.
> Because different sink ICs may support other output formats.
> The current DRM architecture supports retrieving the output format of
> all bridges (eg dpi is implemented via DRM's .atomic_check and
> .atomic_get_output_bus_fmts and .atomic_get_input_bus_fmts).
> If no unified output format is found, the default soc format
> (MEDIA_BUS_FMT_RGB888_2X12_LE in mt8186) is used.
>
> Therefore, if there are other format sink ICs (RGB888_DDR/RGB888_SDR)
> in
> the future, the sink IC needs to add the func implementation
> mentioned
> above needs to be added.
> And the drm architecture will select the appropriate format to change
> the dpi output.
>
> Co-developed-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 630a4e301ef6..bd1870a8504a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -15,6 +15,7 @@
> #include <linux/of_graph.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/platform_device.h>
> +#include <linux/soc/mediatek/mtk-mmsys.h>
> #include <linux/types.h>
>
> #include <video/videomode.h>
> @@ -30,6 +31,7 @@
> #include "mtk_disp_drv.h"
> #include "mtk_dpi_regs.h"
> #include "mtk_drm_ddp_comp.h"
> +#include "mtk_drm_drv.h"
>
> enum mtk_dpi_out_bit_num {
> MTK_DPI_OUT_BIT_NUM_8BITS,
> @@ -82,6 +84,7 @@ struct mtk_dpi {
> struct pinctrl_state *pins_dpi;
> u32 output_fmt;
> int refcount;
> + struct device *mmsys_dev;
> };
>
> static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b)
> @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit {
> * @yuv422_en_bit: Enable bit of yuv422.
> * @csc_enable_bit: Enable bit of CSC.
> * @pixels_per_iter: Quantity of transferred pixels per iteration.
> + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output
> needs to be set in MMSYS.
> */
> struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> @@ -153,6 +157,7 @@ struct mtk_dpi_conf {
> u32 yuv422_en_bit;
> u32 csc_enable_bit;
> u32 pixels_per_iter;
> + bool edge_cfg_in_mmsys;
> };
>
> static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val,
> u32 mask)
> @@ -449,8 +454,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi
> *dpi)
> mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
> dpi->output_fmt ==
> MEDIA_BUS_FMT_RGB888_2X12_LE ?
> EDGE_SEL : 0, EDGE_SEL);
> + if (dpi->conf->edge_cfg_in_mmsys)
> + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev,
> MTK_DPI_RGB888_DDR_CON);
> } else {
> mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,
> 0);
> + if (dpi->conf->edge_cfg_in_mmsys)
> + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev,
> MTK_DPI_RGB888_SDR_CON);
> }
> }
>
> @@ -778,8 +787,10 @@ static int mtk_dpi_bind(struct device *dev,
> struct device *master, void *data)
> {
> struct mtk_dpi *dpi = dev_get_drvdata(dev);
> struct drm_device *drm_dev = data;
> + struct mtk_drm_private *priv = drm_dev->dev_private;
> int ret;
>
> + dpi->mmsys_dev = priv->mmsys_dev;
> ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
> DRM_MODE_ENCODER_TMDS);
> if (ret) {
next prev parent reply other threads:[~2022-09-23 6:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 12:44 [PATCH v8,0/3] Add dpi output format control for MT8186 xinlei.lee
2022-09-22 12:45 ` [PATCH v8,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func xinlei.lee
2022-09-23 9:13 ` AngeloGioacchino Del Regno
2022-09-22 12:45 ` [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186 xinlei.lee
2022-09-23 5:59 ` CK Hu (胡俊光) [this message]
2022-09-23 6:57 ` xinlei.lee
2022-09-23 9:16 ` AngeloGioacchino Del Regno
2022-09-22 12:45 ` [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data xinlei.lee
2022-09-23 6:05 ` CK Hu (胡俊光)
2022-09-23 9:13 ` AngeloGioacchino Del Regno
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