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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Daniel Golle , Qingfang Deng , Matthias Brugger , AngeloGioacchino Del Regno , Simon Horman , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Steven Liu Subject: Re: [PATCH net-next v2 1/3] net: phy: mediatek: Add 2.5Gphy firmware dt-bindings and dts node Message-ID: References: <20250219083910.2255981-1-SkyLake.Huang@mediatek.com> <20250219083910.2255981-2-SkyLake.Huang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250219083910.2255981-2-SkyLake.Huang@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250219_152634_728601_33E65043 X-CRM114-Status: GOOD ( 12.13 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org > +description: | > + MediaTek Built-in 2.5G Ethernet PHY needs to load firmware so it can > + run correctly. > + > +properties: > + compatible: > + const: "mediatek,2p5gphy-fw" > + > + reg: > + items: > + - description: pmb firmware load address > + - description: firmware trigger register > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + phyfw: phy-firmware@f000000 { > + compatible = "mediatek,2p5gphy-fw"; > + reg = <0 0x0f100000 0 0x20000>, > + <0 0x0f0f0018 0 0x20>; > + }; This is not a device in itself is it? There is no driver for this. It seems like these should be properties in the PHY node, since it is the PHY driver which make use of them. This cannot be the first SoC device which is both on some sort of serial bus, but also has memory mapped registers. Please look around and find the correct way to do this. Andrew