Re: [PATCH v1 3/3] ufs: host: mediatek: disable mcq irq when clock off

["Chun-Hung Wu (巫駿宏)" <Chun-hung.Wu@mediatek.com>]

On Thu, 2023-12-21 at 19:04 +0800, peter.wang@mediatek.com wrote:
> From: Peter Wang <peter.wang@mediatek.com>
> 
> Disable mcq irq when clock off, this is same as legacy mode.
> 
> Signed-off-by: Peter Wang <peter.wang@mediatek.com>
> ---
>  drivers/ufs/host/ufs-mediatek.c | 41
> +++++++++++++++++++++++++++++++++
>  drivers/ufs/host/ufs-mediatek.h |  1 +
>  2 files changed, 42 insertions(+)
> 
> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-
> mediatek.c
> index eb1934126c87..51f05038408a 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -660,6 +660,45 @@ static void ufs_mtk_pwr_ctrl(struct ufs_hba
> *hba, bool on)
>  	}
>  }
>  
> +static void ufs_mtk_mcq_disable_irq(struct ufs_hba *hba)
> +{
> +	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> +	u32 irq, i;
> +
> +	if (!is_mcq_enabled(hba))
> +		return;
> +
> +	if (host->mcq_nr_intr == 0)
> +		return;
> +
> +	for (i = 0; i < host->mcq_nr_intr; i++) {
> +		irq = host->mcq_intr_info[i].irq;
> +		disable_irq(irq);
> +	}
> +	host->is_mcq_intr_enabled = false;
> +}
> +
> +static void ufs_mtk_mcq_enable_irq(struct ufs_hba *hba)
> +{
> +	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> +	u32 irq, i;
> +
> +	if (!is_mcq_enabled(hba))
> +		return;
> +
> +	if (host->mcq_nr_intr == 0)
> +		return;
> +
> +	if (host->is_mcq_intr_enabled == true)
> +		return;
> +
> +	for (i = 0; i < host->mcq_nr_intr; i++) {
> +		irq = host->mcq_intr_info[i].irq;
> +		enable_irq(irq);
> +	}
> +	host->is_mcq_intr_enabled = true;
> +}
> +
>  /**
>   * ufs_mtk_setup_clocks - enables/disable clocks
>   * @hba: host controller instance
> @@ -703,8 +742,10 @@ static int ufs_mtk_setup_clocks(struct ufs_hba
> *hba, bool on,
>  
>  		if (clk_pwr_off)
>  			ufs_mtk_pwr_ctrl(hba, false);
> +		ufs_mtk_mcq_disable_irq(hba);
>  	} else if (on && status == POST_CHANGE) {
>  		ufs_mtk_pwr_ctrl(hba, true);
> +		ufs_mtk_mcq_enable_irq(hba);
>  	}
>  
>  	return ret;
> diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-
> mediatek.h
> index f76e80d91729..922f1e51a60c 100644
> --- a/drivers/ufs/host/ufs-mediatek.h
> +++ b/drivers/ufs/host/ufs-mediatek.h
> @@ -186,6 +186,7 @@ struct ufs_mtk_host {
>  	u32 ip_ver;
>  
>  	bool mcq_set_intr;
> +	bool is_mcq_intr_enabled;
>  	int mcq_nr_intr;
>  	struct ufs_mtk_mcq_intr_info mcq_intr_info[UFSHCD_MAX_Q_NR];
>  };

Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>

Chun-Hung