From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 63920CA1009 for ; Wed, 3 Sep 2025 12:46:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=VIzMLsOLaDWB1GYhoINqzSJt837aONUkQA3ng3cfEkg=; b=ZRaCF6RrO/mn6ejiEWL5Vgqml3 nk+OGZwIVI+eKf7b07kzI16YPYlAc+YlLOolXTpiO+gyXzAzivfeJXBo3BX4I3hJVHSg/WE1k0YT6 IvgjpjKRqbau3aENMrRWefFXVv1eCHFRq19mwH/opr60lNXvv4aPUFP37K7+TZoafk7NDDedTgPOi ZAh8pr44AvcYqvy2i9G2nql2016lQCH5b/cO9OJPtWtMKA8l3m2gxsOunAQwITPtwx42dp9g5+ZiW V4wVDdb/n7RZAgRdjIbWXHyAhJ4Lfpv9Sdyys9u3mjvNAUhixNf+dWphAUCMP+WBRUOeNHO9a0FMT 41+99qOg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1utmt8-00000006Req-0bJv; Wed, 03 Sep 2025 12:46:58 +0000 Received: from mgamail.intel.com ([192.198.163.11]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1utm1I-00000006HR6-1bJs; Wed, 03 Sep 2025 11:51:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1756900280; x=1788436280; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=nDvbAiY6rHd3SKV/DYo7HnX4lUjAZdHwuJei+GGsRW8=; b=Lmu9zSaCUL2DDmt+VYYUG73Rf0ud4haj8E+ZxpnguWFsGTL9pzpyPvoX vR9PEAAh//yGEqksOE76diSk8WlL5xQyiNERDvY/vysJWOcHLAnlunYbP 01C8t+Cq66wyhyyoErkc+vuHzg9AXRzGNoHWa6C7WWL3Ea9lNtoltF9s5 s+r1MJsvCA1F3bzKRIa/bi/Py5H1ryo2Mvhm4gN90s9+49butgTQLCdvK cqW8ttsEZXoKXQ0ipX+A7ClNv9Ii5ZlsTdYoag1BBfplxsE+JJtCH+b4I hrCWZ5PQhLT39bWJ4JfF0jzePMZgfVmGegR9gNQY4qCK1aHIUHUgc34S/ Q==; X-CSE-ConnectionGUID: BLnpC03MSgygMYWVm2oFwA== X-CSE-MsgGUID: dux3X92mRiy446ir4xvHpA== X-IronPort-AV: E=McAfee;i="6800,10657,11541"; a="69822595" X-IronPort-AV: E=Sophos;i="6.18,235,1751266800"; d="scan'208";a="69822595" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2025 04:51:19 -0700 X-CSE-ConnectionGUID: IwmxuAerSUCIeLGnj4/KSA== X-CSE-MsgGUID: exSghXJzT32WBa3jKCspRQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,235,1751266800"; d="scan'208";a="195199401" Received: from smile.fi.intel.com ([10.237.72.52]) by fmviesa002.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Sep 2025 04:51:09 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.98.2) (envelope-from ) id 1utm13-0000000AyQC-2iW1; Wed, 03 Sep 2025 14:51:05 +0300 Date: Wed, 3 Sep 2025 14:51:05 +0300 From: Andy Shevchenko To: Bartosz Golaszewski Cc: Andy Shevchenko , Linus Walleij , Bjorn Andersson , Konrad Dybcio , Alexey Klimov , Lorenzo Bianconi , Sean Wang , Matthias Brugger , AngeloGioacchino Del Regno , Paul Cercueil , Kees Cook , Andy Shevchenko , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , NXP S32 Linux Team , Sascha Hauer , Tony Lindgren , Haojian Zhuang , Geert Uytterhoeven , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich , Neil Armstrong , Mark Brown , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-hardening@vger.kernel.org, linux-mm@kvack.org, imx@lists.linux.dev, linux-omap@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Bartosz Golaszewski , Konrad Dybcio Subject: Re: [PATCH v7 16/16] pinctrl: qcom: make the pinmuxing strict Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250903_045120_431025_67664FC2 X-CRM114-Status: GOOD ( 42.63 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Wed, Sep 03, 2025 at 01:05:27PM +0200, Bartosz Golaszewski wrote: > On Wed, Sep 3, 2025 at 12:53 PM Andy Shevchenko > wrote: > > On Wed, Sep 03, 2025 at 12:41:48PM +0200, Bartosz Golaszewski wrote: > > > On Wed, Sep 3, 2025 at 12:38 PM Andy Shevchenko > > > wrote: > > > > On Wed, Sep 03, 2025 at 12:34:00PM +0200, Bartosz Golaszewski wrote: > > > > > On Wed, Sep 3, 2025 at 12:22 PM Andy Shevchenko > > > > > wrote: > > > > > > On Wed, Sep 03, 2025 at 09:33:34AM +0200, Bartosz Golaszewski wrote: > > > > > > > On Tue, Sep 2, 2025 at 10:46 PM Andy Shevchenko > > > > > > > wrote: > > > > > > > > On Tue, Sep 2, 2025 at 8:42 PM Bartosz Golaszewski wrote: > > > > > > > > > On Tue, Sep 2, 2025 at 4:38 PM Andy Shevchenko > > > > > > > > > wrote: > > > > > > > > > > On Tue, Sep 02, 2025 at 01:59:25PM +0200, Bartosz Golaszewski wrote: ... > > > > > > > > > > > The strict flag in struct pinmux_ops disallows the usage of the same pin > > > > > > > > > > > as a GPIO and for another function. Without it, a rouge user-space > > > > > > > > > > > process with enough privileges (or even a buggy driver) can request a > > > > > > > > > > > used pin as GPIO and drive it, potentially confusing devices or even > > > > > > > > > > > crashing the system. Set it globally for all pinctrl-msm users. > > > > > > > > > > > > > > > > > > > > How does this keep (or allow) I²C generic recovery mechanism to work? > > > > > > > > > > > > > > Anyway, what is your point? I don't think it has any impact on this. > > > > > > > > > > > > If we have a group of pins that are marked as I²C, and we want to use recovery > > > > > > via GPIOs, would it be still possible to request as GPIO when controller driver > > > > > > is in the strict mode? > > > > > > > > > > Yes, if you mark that function as a "GPIO" function in the pin > > > > > controller driver. > > > > > > > > How would it prevent from requesting from user space? > > > > > > It wouldn't, we don't discriminate between user-space and in-kernel > > > GPIO users. A function either is a GPIO or isn't. Can you point me to > > > the driver you're thinking about or is this a purely speculative > > > question? > > > > The recovery mechanism is in I²C core and many drivers use that. > > I'm not aware of Qualcomm drivers in particular. But mechanism is > > in use in I²C DesignWare which is distributed a lot among platforms, > > so using word 'purely' is incorrect, and word 'speculative' is a bit > > strong, but you can think of the issue coming later on when somebody > > does something like this. > > > > The same applies to the in-band wakeup UART mechanism. > > > > Which means that with this series we will relax it back anyway for > > the above mentioned cases. > > > > (Not sure, but SPI DesignWare requires programming SPI native chip selects even > > if the GPIO is used for that, this might have also some implications, but here > > it's for real 'purely speculative'.) > > The high-level answer is: yes, a pin that will be used by GPIOLIB > needs the function it's muxed to, to be marked as "GPIOable" in its > parent pin controller if it's strict. That's still better than the > current situation. > > I can imagine we could differentiate between in-kernel and user-space > users of GPIOs and then make it impossible for the latter to request > certain pins while they could still be requested in the kernel but > that's outside of the scope of this series. > > I don't see why this would stop these patches though, as they don't > break anything unless you decide to make your pin controller strict in > which situation you'd need to verify which functions can GPIOs anyway. It can't anyway, Linus already applied :-) -- With Best Regards, Andy Shevchenko