Re: [PATCH 2/2] arm64: dts: mediatek: mt7988: add PWM controller

AngeloGioacchino Del Regno
2024-02-14T09:10:06Z

Il 13/02/24 17:46, Rafał Miłecki ha scritto:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> Add binding for on-SoC controller that can control up to 8 PWMs.
>
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 21 ++++++++++++++++++++-
> 1 file changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> index bba97de4fb44..67007626b5cd 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0-only OR MIT
>
> +#include <dt-bindings/clock/mediatek,mt7988-clk.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>
> / {
> @@ -78,7 +79,7 @@ gic: interrupt-controller@c000000 {
> #interrupt-cells = <3>;
> };
>
> - clock-controller@10001000 {
> + infracfg: clock-controller@10001000 {
> compatible = "mediatek,mt7988-infracfg", "syscon";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> @@ -103,6 +104,24 @@ clock-controller@1001e000 {
> #clock-cells = <1>;
> };
>
> + pwm@10048000 {
> + compatible = "mediatek,mt7988-pwm";

I can't take this unless there's a driver that supports your device.

Regards,
Angelo

> + reg = <0 0x10048000 0 0x1000>;
> + clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
> + <&infracfg CLK_INFRA_66M_PWM_HCK>,
> + <&infracfg CLK_INFRA_66M_PWM_CK1>,
> + <&infracfg CLK_INFRA_66M_PWM_CK2>,
> + <&infracfg CLK_INFRA_66M_PWM_CK3>,
> + <&infracfg CLK_INFRA_66M_PWM_CK4>,
> + <&infracfg CLK_INFRA_66M_PWM_CK5>,
> + <&infracfg CLK_INFRA_66M_PWM_CK6>,
> + <&infracfg CLK_INFRA_66M_PWM_CK7>,
> + <&infracfg CLK_INFRA_66M_PWM_CK8>;
> + clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6",
> + "pwm7","pwm8";
> + #pwm-cells = <2>;
> + };
> +
> clock-controller@11f40000 {
> compatible = "mediatek,mt7988-xfi-pll";
> reg = <0 0x11f40000 0 0x1000>;