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Mon, 28 Dec 2020 01:32:37 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id D1A33C43466; Mon, 28 Dec 2020 01:32:37 +0000 (UTC) Received: from [192.168.8.168] (cpe-70-95-149-85.san.res.rr.com [70.95.149.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: asutoshd) by smtp.codeaurora.org (Postfix) with ESMTPSA id A2AF9C433CA; Mon, 28 Dec 2020 01:32:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A2AF9C433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=asutoshd@codeaurora.org Subject: Re: [PATCH v1] scsi: ufs-mediatek: Enable UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL To: Stanley Chu , Bean Huo References: <20201222072928.32328-1-stanley.chu@mediatek.com> <1608697172.14045.5.camel@mtkswgap22> <1608796334.14045.21.camel@mtkswgap22> <5eb12622222bd9ba5e705801a204f3160ba3966b.camel@gmail.com> <1608817657.14045.30.camel@mtkswgap22> From: "Asutosh Das (asd)" Message-ID: Date: Sun, 27 Dec 2020 17:32:35 -0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: <1608817657.14045.30.camel@mtkswgap22> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201227_203249_530625_87390A73 X-CRM114-Status: GOOD ( 26.84 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "jiajie.hao@mediatek.com" , "linux-scsi@vger.kernel.org" , "martin.petersen@oracle.com" , "andy.teng@mediatek.com" , "jejb@linux.ibm.com" , "chun-hung.wu@mediatek.com" , "kuohong.wang@mediatek.com" , "linux-kernel@vger.kernel.org" , "cc.chou@mediatek.com" , Avri Altman , Can Guo , "linux-mediatek@lists.infradead.org" , "peter.wang@mediatek.com" , "alim.akhtar@samsung.com" , "matthias.bgg@gmail.com" , "alice.chao@mediatek.com" , "chaotian.jing@mediatek.com" , "bvanassche@acm.org" , "linux-arm-kernel@lists.infradead.org" , "beanhuo@micron.com" Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On 12/24/2020 5:47 AM, Stanley Chu wrote: > Hi Avri, Bean, > > On Thu, 2020-12-24 at 13:01 +0100, Bean Huo wrote: >> On Thu, 2020-12-24 at 11:03 +0000, Avri Altman wrote: >>>>> Do you see any substantial benefit of having >>>>> fWriteBoosterBufferFlushEn >>>>> disabled? >>>> >>>> 1. The definition of fWriteBoosterBufferFlushEn is that host allows >>>> device to do flush in anytime after fWriteBoosterBufferFlushEn is >>>> set as >>>> on. This is not what we want. >>>> >>>> Just Like BKOP, We do not want flush happening beyond host's >>>> expected >>>> timing that device performance may be "randomly" dropped. >>> >>> Explicit flush takes place only when the device is idle: >>> if fWriteBoosterBufferFlushEn is set, the device is idle, and before >>> h8 received. >>> If a request arrives, the flush operation should be halted. >>> So no performance degradation is expected. >> >> Hi Stanley >> >> Avri's comment is correct, fWriteBoosterBufferFlushEn==1, device will >> flush only when it is in idle, once there is new incoming request, the >> flush will be suspended. You should be very careful when you want to >> skip this stetting of this flag. > > Very appreciate your the clarification. > > However similar to "Background Operations Termination Latency", while > the next request comes, device may need some time to suspend on-going > flush operations. This delay may "randomly" degrade the performance > right? > Have you actually seen this happening? I've not come across any random performance degradation concerns, hence asking. From what I've observed is the handling of WB buffer flush depends on how flash vendors implement it. Some vendors that I've seen just create a separate WB buffer in an instant. I don't know the intricacies of their implementation, but I guess the new WB buffer handles the requests while the previous one is being flushed. Anyway, for Qualcomm platforms we plan to have fWriteBoosterBufferFlushEn=1 by default. > Since the configuration, i.e., enable > fWriteBoosterBufferFlushDuringHibernate only with > fWriteBoosterBufferFlushEn disabled, has been applied in many of our > mass-produced products these yeas, we would like to keep it unless the > new setting has obvious benefits. > > Thanks, > Stanley Chu > >> >> Bean >> > -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, Linux Foundation Collaborative Project _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek