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Fri, 18 Mar 2022 07:45:27 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Mar 2022 07:45:26 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 18 Mar 2022 22:45:24 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 18 Mar 2022 22:45:23 +0800 Message-ID: Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY From: Jianjun Wang To: Krzysztof Kozlowski , Chunfeng Yun , Kishon Vijay Abraham I , "Vinod Koul" , Rob Herring , Matthias Brugger , Chen-Yu Tsai CC: , , , , , , , , , , Date: Fri, 18 Mar 2022 22:45:23 +0800 In-Reply-To: References: <20220318095417.2016-1-jianjun.wang@mediatek.com> <20220318095417.2016-2-jianjun.wang@mediatek.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220318_074534_292793_4606A5BD X-CRM114-Status: GOOD ( 19.00 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi Krzysztof, On Fri, 2022-03-18 at 14:55 +0100, Krzysztof Kozlowski wrote: > On 18/03/2022 10:54, Jianjun Wang wrote: > > Add YAML schema documentation for PCIe PHY on MediaTek chipsets. > > > > Signed-off-by: Jianjun Wang > > --- > > .../bindings/phy/mediatek,pcie-phy.yaml | 75 > > +++++++++++++++++++ > > 1 file changed, 75 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml > > > > diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie- > > phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie- > > phy.yaml > > new file mode 100644 > > index 000000000000..868bf976568b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml > > @@ -0,0 +1,75 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MediaTek PCIe PHY > > + > > +maintainers: > > + - Jianjun Wang > > + > > +description: | > > + The PCIe PHY supports physical layer functionality for PCIe Gen3 > > port. > > + > > +properties: > > + compatible: > > + const: mediatek,mt8195-pcie-phy > > + > > + reg: > > + maxItems: 1 > > + > > + reg-names: > > + items: > > + - const: sif > > + > > + "#phy-cells": > > + const: 0 > > + > > + nvmem-cells: > > + description: > > + Phandles to nvmem cell that contains the efuse data, if > > unspecified, > > + default value is used. > > maxItems: 7 Thanks for your review, I'll fix it in the next version. > > Best regards, > Krzysztof _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek