From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 879A3C02187 for ; Sun, 19 Jan 2025 17:33:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=AqXJtOIf4rCW4A5e2bQ1EyB3uRGWzyR+eKwMln2F0eU=; b=kjKu3o+lELfF+uvIPwAR/kM6tN R/0Etzg6DhxNaPtaXDffvRxaZRBZBlT7NU6nJsf0Dp4fgCIAgXPkkiTh7a6c52zLie0UE3FwrV2Aw EwnP/u2oZ+eyMbCcb1jGlJV6s9JuOporjgdiIq2grvHCecmi/pf/fR49B6mW6WLmKp4dKwsD1dx2F KieViPPd8MtI3pzu89v+MotYdwvtj/TXs+IP1BzgkLenAUKWQDNkIvotP70n/oWhPPiTXB3DGIDP4 /GQlJpJCeg6Q9RR7WSEQLfxEGPhHXM856LQftCnCFqzcLoJPDszylY1cQXzEaBJ0NsnWA1uwyFyh9 xc0syxHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tZZAk-00000004C4c-1m2k; Sun, 19 Jan 2025 17:33:18 +0000 Received: from vps0.lunn.ch ([156.67.10.101]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tZZ9S-00000004BpB-3Xk8; Sun, 19 Jan 2025 17:31:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=AqXJtOIf4rCW4A5e2bQ1EyB3uRGWzyR+eKwMln2F0eU=; b=Dpa5oybnNfPHVmxV3G/PBBg4wO ePgzRXYgm9RJQ+5DVbWvV6RQeGb6G3Pji/0gWgyWvwVydMdgJmjCfe5oqfSAmkXCa6raJn2TsBodQ OkLck7d8V2VdHcoV4XPy0srE7ynBEfLEYZXnQTzAED9gj04OJ5ihlKCXZYBjCbXH9Es8=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1tZZ9E-0066tP-JT; Sun, 19 Jan 2025 18:31:44 +0100 Date: Sun, 19 Jan 2025 18:31:44 +0100 From: Andrew Lunn To: Sky Huang Cc: Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Daniel Golle , Qingfang Deng , Matthias Brugger , AngeloGioacchino Del Regno , Simon Horman , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Steven Liu Subject: Re: [PATCH net-next 3/3] net: phy: mediatek: add driver for built-in 2.5G ethernet PHY on MT7988 Message-ID: References: <20250116012159.3816135-1-SkyLake.Huang@mediatek.com> <20250116012159.3816135-4-SkyLake.Huang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250116012159.3816135-4-SkyLake.Huang@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250119_093158_895413_09281ADB X-CRM114-Status: GOOD ( 13.56 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org > + np = of_find_compatible_node(NULL, NULL, "mediatek,2p5gphy-fw"); > + if (!np) > + return -ENOENT; The device tree binding need documenting. > + /* Write magic number to safely stall MCU */ > + phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x800e, 0x1100); > + phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x800f, 0x00df); 0x1100 and 0x00df are magic numbers, bit 0x800e and 0x800f are not. Please add #defines. > + > + for (i = 0; i < MT7988_2P5GE_PMB_FW_SIZE - 1; i += 4) > + writel(*((uint32_t *)(fw->data + i)), pmb_addr + i); > + dev_info(dev, "Firmware date code: %x/%x/%x, version: %x.%x\n", > + be16_to_cpu(*((__be16 *)(fw->data + > + MT7988_2P5GE_PMB_FW_SIZE - 8))), > + *(fw->data + MT7988_2P5GE_PMB_FW_SIZE - 6), > + *(fw->data + MT7988_2P5GE_PMB_FW_SIZE - 5), > + *(fw->data + MT7988_2P5GE_PMB_FW_SIZE - 2), > + *(fw->data + MT7988_2P5GE_PMB_FW_SIZE - 1)); > + > + writew(reg & ~MD32_EN, mcu_csr_base + MD32_EN_CFG); > + writew(reg | MD32_EN, mcu_csr_base + MD32_EN_CFG); > + phy_set_bits(phydev, MII_BMCR, BMCR_RESET); > + /* We need a delay here to stabilize initialization of MCU */ > + usleep_range(7000, 8000); > + dev_info(dev, "Firmware loading/trigger ok.\n"); We generally don't spam the log for "Happy Days" conditions. Please only log if firmware download fails. > +static int mt798x_2p5ge_phy_get_features(struct phy_device *phydev) > +{ > + int ret; > + > + ret = genphy_c45_pma_read_abilities(phydev); > + if (ret) > + return ret; > + > + /* This phy can't handle collision, and neither can (XFI)MAC it's > + * connected to. Although it can do HDX handshake, it doesn't support > + * CSMA/CD that HDX requires. > + */ > + linkmode_clear_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, > + phydev->supported); So it can do 10BaseT_Half? What about 1000BaseT_Half? As you said somewhere, 10/100/1G are not in the C45 space. So does genphy_c45_pma_read_abilities() report these features? Andrew