Re: [PATCH] clk: mediatek: Use devm_alloc for clk_data allocation to fix memory leak on probe error

kernel test robot
2025-09-29T06:56:38Z

Hi Haotian,

kernel test robot noticed the following build errors:

[auto build test ERROR on clk/clk-next]
[also build test ERROR on linus/master v6.17 next-20250926]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url: https://github.com/intel-lab-lkp/linux/commits/Haotian-Zhang/clk-mediatek-Use-devm_alloc-for-clk_data-allocation-to-fix-memory-leak-on-probe-error/20250929-103835
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link: https://lore.kernel.org/r/20250929023621.1968-1-vulab%40iscas.ac.cn
patch subject: [PATCH] clk: mediatek: Use devm_alloc for clk_data allocation to fix memory leak on probe error
config: i386-buildonly-randconfig-001-20250929 (https://download.01.org/0day-ci/archive/20250929/202509291432.RfHOsLVY-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250929/202509291432.RfHOsLVY-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509291432.RfHOsLVY-lkp@intel.com/

All errors (new ones prefixed by >>):

In file included from drivers/clk/mediatek/clk-mt6765.c:20:
drivers/clk/mediatek/clk-mt6765.c: In function 'clk_mt6765_apmixed_probe':
>> include/dt-bindings/clock/mt6765-clk.h:32:41: error: passing argument 1 of 'mtk_devm_alloc_clk_data' makes pointer from integer without a cast [-Wint-conversion]
32 | #define CLK_APMIXED_NR_CLK 22
| ^~
| |
| int
drivers/clk/mediatek/clk-mt6765.c:739:44: note: in expansion of macro 'CLK_APMIXED_NR_CLK'
739 | clk_data = mtk_devm_alloc_clk_data(CLK_APMIXED_NR_CLK);
| ^~~~~~~~~~~~~~~~~~
In file included from drivers/clk/mediatek/clk-mt6765.c:16:
drivers/clk/mediatek/clk-mtk.h:234:68: note: expected 'struct device *' but argument is of type 'int'
234 | struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
| ~~~~~~~~~~~~~~~^~~
>> drivers/clk/mediatek/clk-mt6765.c:739:20: error: too few arguments to function 'mtk_devm_alloc_clk_data'
739 | clk_data = mtk_devm_alloc_clk_data(CLK_APMIXED_NR_CLK);
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:234:29: note: declared here
234 | struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6765.c: In function 'clk_mt6765_top_probe':
include/dt-bindings/clock/mt6765-clk.h:161:41: error: passing argument 1 of 'mtk_devm_alloc_clk_data' makes pointer from integer without a cast [-Wint-conversion]
161 | #define CLK_TOP_NR_CLK 126
| ^~~
| |
| int
drivers/clk/mediatek/clk-mt6765.c:773:44: note: in expansion of macro 'CLK_TOP_NR_CLK'
773 | clk_data = mtk_devm_alloc_clk_data(CLK_TOP_NR_CLK);
| ^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:234:68: note: expected 'struct device *' but argument is of type 'int'
234 | struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
| ~~~~~~~~~~~~~~~^~~
drivers/clk/mediatek/clk-mt6765.c:773:20: error: too few arguments to function 'mtk_devm_alloc_clk_data'
773 | clk_data = mtk_devm_alloc_clk_data(CLK_TOP_NR_CLK);
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:234:29: note: declared here
234 | struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6765.c: In function 'clk_mt6765_ifr_probe':
include/dt-bindings/clock/mt6765-clk.h:228:41: error: passing argument 1 of 'mtk_devm_alloc_clk_data' makes pointer from integer without a cast [-Wint-conversion]
228 | #define CLK_IFR_NR_CLK 64
| ^~
| |
| int
drivers/clk/mediatek/clk-mt6765.c:813:44: note: in expansion of macro 'CLK_IFR_NR_CLK'
813 | clk_data = mtk_devm_alloc_clk_data(CLK_IFR_NR_CLK);
| ^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:234:68: note: expected 'struct device *' but argument is of type 'int'
234 | struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
| ~~~~~~~~~~~~~~~^~~
drivers/clk/mediatek/clk-mt6765.c:813:20: error: too few arguments to function 'mtk_devm_alloc_clk_data'
813 | clk_data = mtk_devm_alloc_clk_data(CLK_IFR_NR_CLK);
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:234:29: note: declared here
234 | struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
| ^~~~~~~~~~~~~~~~~~~~~~~

vim +/mtk_devm_alloc_clk_data +32 include/dt-bindings/clock/mt6765-clk.h

eb7beb65ac30af Mars Cheng 2020-02-21 8
eb7beb65ac30af Mars Cheng 2020-02-21 9 /* APMIXEDSYS */
eb7beb65ac30af Mars Cheng 2020-02-21 10 #define CLK_APMIXED_ARMPLL_L 0
eb7beb65ac30af Mars Cheng 2020-02-21 11 #define CLK_APMIXED_ARMPLL 1
eb7beb65ac30af Mars Cheng 2020-02-21 12 #define CLK_APMIXED_CCIPLL 2
eb7beb65ac30af Mars Cheng 2020-02-21 13 #define CLK_APMIXED_MAINPLL 3
eb7beb65ac30af Mars Cheng 2020-02-21 14 #define CLK_APMIXED_MFGPLL 4
eb7beb65ac30af Mars Cheng 2020-02-21 15 #define CLK_APMIXED_MMPLL 5
eb7beb65ac30af Mars Cheng 2020-02-21 16 #define CLK_APMIXED_UNIV2PLL 6
eb7beb65ac30af Mars Cheng 2020-02-21 17 #define CLK_APMIXED_MSDCPLL 7
eb7beb65ac30af Mars Cheng 2020-02-21 18 #define CLK_APMIXED_APLL1 8
eb7beb65ac30af Mars Cheng 2020-02-21 19 #define CLK_APMIXED_MPLL 9
eb7beb65ac30af Mars Cheng 2020-02-21 20 #define CLK_APMIXED_ULPOSC1 10
eb7beb65ac30af Mars Cheng 2020-02-21 21 #define CLK_APMIXED_ULPOSC2 11
eb7beb65ac30af Mars Cheng 2020-02-21 22 #define CLK_APMIXED_SSUSB26M 12
eb7beb65ac30af Mars Cheng 2020-02-21 23 #define CLK_APMIXED_APPLL26M 13
eb7beb65ac30af Mars Cheng 2020-02-21 24 #define CLK_APMIXED_MIPIC0_26M 14
eb7beb65ac30af Mars Cheng 2020-02-21 25 #define CLK_APMIXED_MDPLLGP26M 15
eb7beb65ac30af Mars Cheng 2020-02-21 26 #define CLK_APMIXED_MMSYS_F26M 16
eb7beb65ac30af Mars Cheng 2020-02-21 27 #define CLK_APMIXED_UFS26M 17
eb7beb65ac30af Mars Cheng 2020-02-21 28 #define CLK_APMIXED_MIPIC1_26M 18
eb7beb65ac30af Mars Cheng 2020-02-21 29 #define CLK_APMIXED_MEMPLL26M 19
eb7beb65ac30af Mars Cheng 2020-02-21 30 #define CLK_APMIXED_CLKSQ_LVPLL_26M 20
eb7beb65ac30af Mars Cheng 2020-02-21 31 #define CLK_APMIXED_MIPID0_26M 21
eb7beb65ac30af Mars Cheng 2020-02-21 @32 #define CLK_APMIXED_NR_CLK 22
eb7beb65ac30af Mars Cheng 2020-02-21 33

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