Re: [PATCH v16 3/8] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding - Jason-JH Lin

From: Jason-JH Lin <jason-jh.lin@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Rob Herring <robh+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: devicetree@vger.kernel.org,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, singo.chang@mediatek.com,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	roy-cw.yeh@mediatek.com,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	Fabien Parent <fparent@baylibre.com>,
	moudy.ho@mediatek.com, linux-mediatek@lists.infradead.org,
	Daniel Vetter <daniel@ffwll.ch>,
	hsinyi@chromium.org,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	nancy.lin@mediatek.com, linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v16 3/8] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding
Date: Mon, 28 Mar 2022 11:29:24 +0800	[thread overview]
Message-ID: <f52fbaec28ae53667ba101a05406b62e5970eec1.camel@mediatek.com> (raw)
In-Reply-To: <1daa3b8dabb97017d0f92437a81b250f8375544c.camel@mediatek.com>

Hi CK,

Thanks for the reviews.

On Fri, 2022-03-18 at 14:43 +0800, CK Hu wrote:
> Hi, Jason:
> 
> On Mon, 2022-03-07 at 11:28 +0800, jason-jh.lin wrote:
> > There are 2 mmsys, namely vdosys0 and vdosys1 in mt8195.
> > Each of them is bound to a display pipeline, so add their
> > definition in mtk-mmsys documentation with 2 compatibles.
> 
> Could one vdosys be union of vdosys0 and vdosys1? In MT8173, one
> mmsys
> support multiple pipeline. Describe more in commit message to support
> that two vdosys are necessary.
> 
> Regards,
> CK
> 

In the SoC before, such as mt8173, it has 2 pipelines binding to one
mmsys with the same clock driver and the same power domain.

In mt8195, 2 pipelines are binding to different mmsys, such as vdosys0
and vdosys1. Each mmsys uses different clock drivers and different
power domain.

Since each mmsys has its own clock, I have tried to differentiate
vppsys0, vppsys1, vdosys0, vdosys1 by the clock names.
Then I can use one mmsys compatible name for all of them.

I'll apply this method at the next version.
And also sync with Nancy(vdosys1) and Roy(vppsys0, vppsys1).

Regards,
Jason-JH.Lin

> > 
> > Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> > ---
> >  .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        |
> > 2
> > ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > index 6c2c3edcd443..c5ba515cb0d7 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam
> > l
> > @@ -32,6 +32,8 @@ properties:
> >                - mediatek,mt8186-mmsys
> >                - mediatek,mt8192-mmsys
> >                - mediatek,mt8365-mmsys
> > +              - mediatek,mt8195-vdosys0
> > +              - mediatek,mt8195-vdosys1
> >            - const: syscon
> >        - items:
> >            - const: mediatek,mt7623-mmsys
> 
> 
-- 
Jason-JH Lin <jason-jh.lin@mediatek.com>

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