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From: Harald Koerfgen <hkoerfg@web.de>
Organization: none to speak of
To: Jun Sun <jsun@mvista.com>, "H . J . Lu" <hjl@lucon.org>
Subject: Re: A new mips toolchain is available
Date: Wed, 13 Jun 2001 22:55:00 +0200
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References: <20010613082417.C9739@lucon.org> <20010613084416.A10334@lucon.org> <3B27B56F.65BAE189@mvista.com>
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On Wednesday 13 June 2001 20:48, Jun Sun wrote:
> The latest CVS tree removed MIPS_ATOMIC_SET for CPUs without ll/sc.  See
> the diff below.

[diff snipped]

> It seems that the checkin is a mistake because apparently it is not what
> linux-vr is doing.  They used to have a piece of code for CPUs without
> ll/sc. And recently they moved to ll/sc instruction emulation.

Well, you seem to have a different linux-vr tree than I do :-)

> Ralf, the following patch includes the original vr code for
> MIPS_ATOMIC_SET, no ll/sc case.  Although we all know it is buggy (for
> small negative set values), it is still better than nothing.

Anyway, the linux-vr source tree has a partially working ll/sc emulation, at 
least enough for glibc, and MIPS_ATOMIC_SET is not neccessarily needed.
In fact, MIPS_ATOMIC_SET has been removed from the vr tree.

Regards,
Harald