From: Kevin Paul Herbert <kph@cisco.com>
To: linux-mips@linux-mips.org
Subject: [Patch] SB1 cache exception handler fails to compile [arch/mips/mm/cex-sb1.S]
Date: 15 Jan 2004 11:00:58 -0800 [thread overview]
Message-ID: <1074193246.24675.19.camel@shakedown> (raw)
The recent update to arch/mips/mm/cex-sb1.S (1.13) adds an include for
<asm/processor.h> unnecessarily. This include file defines C structs and
the like which the assembler chokes upon.
Kevin
--
Kevin Paul Herbert <kph@cisco.com>
cisco Systems, Inc.
Index: arch/mips/mm/cex-sb1.S
===================================================================
RCS file: /home/cvs/linux/arch/mips/mm/cex-sb1.S,v
retrieving revision 1.13
diff -u -r1.13 cex-sb1.S
--- arch/mips/mm/cex-sb1.S 14 Jan 2004 18:46:21 -0000 1.13
+++ arch/mips/mm/cex-sb1.S 15 Jan 2004 18:55:28 -0000
@@ -23,7 +23,6 @@
#include <asm/mipsregs.h>
#include <asm/stackframe.h>
#include <asm/cacheops.h>
-#include <asm/processor.h>
#include <asm/sibyte/board.h>
#define C0_ERRCTL $26 /* CP0: Error info */
reply other threads:[~2004-01-15 19:01 UTC|newest]
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