From: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>,
Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Subject: [PATCH 0/2] RFC: Alchemy: multiple timer base address support
Date: Sat, 22 Aug 2009 18:09:59 +0200 [thread overview]
Message-ID: <1250957401-14447-1-git-send-email-manuel.lauss@gmail.com> (raw)
The Au1300 has the SYS_ block, which incorporates the 32kHz timer, PM
support and other stuff, at a base address different from all previous
models. The following two patches add support for runtime detection
of CPU type and setup the timer on the correct base address (and as
preparation for a later patchseries, also irq number for RTCMATCH2).
Patch overview:
#1 adds a simple CPU subtype enumerator,
#2 implements the core changes.
Run-tested on DB1200.
Manuel Lauss (2):
Alchemy: simple cpu subtype detector.
Alchemy: timer: support multiple SYS_BASE addresses
arch/mips/alchemy/common/time.c | 137 ++++++++++++++++++++--------
arch/mips/alchemy/devboards/pm.c | 58 +++++++-----
arch/mips/include/asm/mach-au1x00/au1000.h | 66 ++++++++++++--
3 files changed, 191 insertions(+), 70 deletions(-)
next reply other threads:[~2009-08-22 16:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-22 16:09 Manuel Lauss [this message]
2009-08-22 16:10 ` [PATCH 1/2] Alchemy: simple cpu subtype detector Manuel Lauss
2009-08-22 16:10 ` [PATCH 2/2] Alchemy: timer: support multiple SYS_BASE addresses Manuel Lauss
2009-08-27 11:47 ` Ralf Baechle
2009-08-27 12:49 ` Manuel Lauss
2009-08-27 11:46 ` [PATCH 1/2] Alchemy: simple cpu subtype detector Ralf Baechle
2009-08-27 11:49 ` [PATCH 0/2] RFC: Alchemy: multiple timer base address support Ralf Baechle
2009-08-27 13:01 ` Manuel Lauss
2009-08-27 14:15 ` Ralf Baechle
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