From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 25 Sep 2014 04:52:40 +0200 (CEST) Received: from szxga02-in.huawei.com ([119.145.14.65]:18746 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27008993AbaIYCv1hUBib (ORCPT ); Thu, 25 Sep 2014 04:51:27 +0200 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BZX30367; Thu, 25 Sep 2014 10:50:43 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Thu, 25 Sep 2014 10:50:32 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thierry Reding , "Thomas Petazzoni" , Yijing Wang Subject: [PATCH v2 09/22] x86/xen/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Thu, 25 Sep 2014 11:14:19 +0800 Message-ID: <1411614872-4009-10-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 42779 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: wangyijing@huawei.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Tested-by: Konrad Rzeszutek Wilk Signed-off-by: Yijing Wang Acked-by: David Vrabel Reviewed-by: Konrad Rzeszutek Wilk CC: Konrad Rzeszutek Wilk --- arch/x86/pci/xen.c | 46 ++++++++++++++++++++++++++++++---------------- 1 files changed, 30 insertions(+), 16 deletions(-) diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 84c2fce..e669ee4 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -376,6 +376,11 @@ static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) } #endif +static void xen_teardown_msi_irq(unsigned int irq) +{ + xen_destroy_irq(irq); +} + static void xen_teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *msidesc; @@ -385,19 +390,26 @@ static void xen_teardown_msi_irqs(struct pci_dev *dev) xen_pci_frontend_disable_msix(dev); else xen_pci_frontend_disable_msi(dev); - - /* Free the IRQ's and the msidesc using the generic code. */ - default_teardown_msi_irqs(dev); -} - -static void xen_teardown_msi_irq(unsigned int irq) -{ - xen_destroy_irq(irq); + + list_for_each_entry(msidesc, &dev->msi_list, list) { + int i, nvec; + if (msidesc->irq == 0) + continue; + if (msidesc->nvec_used) + nvec = msidesc->nvec_used; + else + nvec = 1 << msidesc->msi_attrib.multiple; + for (i = 0; i < nvec; i++) + xen_teardown_msi_irq(msidesc->irq + i); + } } void xen_nop_msi_mask(struct irq_data *data) { } + +struct msi_chip xen_msi_chip; + #endif int __init pci_xen_init(void) @@ -418,9 +430,9 @@ int __init pci_xen_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; + xen_msi_chip.setup_irqs = xen_setup_msi_irqs; + xen_msi_chip.teardown_irqs = xen_teardown_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif @@ -441,8 +453,9 @@ int __init pci_xen_hvm_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; + xen_msi_chip.setup_irqs = xen_hvm_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + x86_msi_chip = &xen_msi_chip; #endif return 0; } @@ -499,9 +512,10 @@ int __init pci_xen_initial_domain(void) int irq; #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; + xen_msi_chip.setup_irqs = xen_initdom_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + xen_msi_chip.restore_irqs = xen_initdom_restore_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif -- 1.7.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from szxga02-in.huawei.com ([119.145.14.65]:18746 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27008993AbaIYCv1hUBib (ORCPT ); Thu, 25 Sep 2014 04:51:27 +0200 From: Yijing Wang Subject: [PATCH v2 09/22] x86/xen/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Thu, 25 Sep 2014 11:14:19 +0800 Message-ID: <1411614872-4009-10-git-send-email-wangyijing@huawei.com> In-Reply-To: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 Content-Type: text/plain Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Wuyun , linux-arm-kernel@lists.infradead.org, Russell King , linux-arch@vger.kernel.org, arnab.basu@freescale.com, Bharat.Bhushan@freescale.com, x86@kernel.org, Arnd Bergmann , Thomas Gleixner , Konrad Rzeszutek Wilk , xen-devel@lists.xenproject.org, Joerg Roedel , iommu@lists.linux-foundation.org, linux-mips@linux-mips.org, Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Sebastian Ott , Tony Luck , linux-ia64@vger.kernel.org, "David S. Miller" , sparclinux@vger.kernel.org, Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , Sergei Shtylyov , Michael Ellerman , Thierry Reding , Thomas Petazzoni , Yijing Wang Message-ID: <20140925031419.cNGnY5u2tnb050P02ibTW8B4a2ryZWXlW7iHiGu1FHw@z> Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Tested-by: Konrad Rzeszutek Wilk Signed-off-by: Yijing Wang Acked-by: David Vrabel Reviewed-by: Konrad Rzeszutek Wilk CC: Konrad Rzeszutek Wilk --- arch/x86/pci/xen.c | 46 ++++++++++++++++++++++++++++++---------------- 1 files changed, 30 insertions(+), 16 deletions(-) diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 84c2fce..e669ee4 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c @@ -376,6 +376,11 @@ static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) } #endif +static void xen_teardown_msi_irq(unsigned int irq) +{ + xen_destroy_irq(irq); +} + static void xen_teardown_msi_irqs(struct pci_dev *dev) { struct msi_desc *msidesc; @@ -385,19 +390,26 @@ static void xen_teardown_msi_irqs(struct pci_dev *dev) xen_pci_frontend_disable_msix(dev); else xen_pci_frontend_disable_msi(dev); - - /* Free the IRQ's and the msidesc using the generic code. */ - default_teardown_msi_irqs(dev); -} - -static void xen_teardown_msi_irq(unsigned int irq) -{ - xen_destroy_irq(irq); + + list_for_each_entry(msidesc, &dev->msi_list, list) { + int i, nvec; + if (msidesc->irq == 0) + continue; + if (msidesc->nvec_used) + nvec = msidesc->nvec_used; + else + nvec = 1 << msidesc->msi_attrib.multiple; + for (i = 0; i < nvec; i++) + xen_teardown_msi_irq(msidesc->irq + i); + } } void xen_nop_msi_mask(struct irq_data *data) { } + +struct msi_chip xen_msi_chip; + #endif int __init pci_xen_init(void) @@ -418,9 +430,9 @@ int __init pci_xen_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; + xen_msi_chip.setup_irqs = xen_setup_msi_irqs; + xen_msi_chip.teardown_irqs = xen_teardown_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif @@ -441,8 +453,9 @@ int __init pci_xen_hvm_init(void) #endif #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; + xen_msi_chip.setup_irqs = xen_hvm_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + x86_msi_chip = &xen_msi_chip; #endif return 0; } @@ -499,9 +512,10 @@ int __init pci_xen_initial_domain(void) int irq; #ifdef CONFIG_PCI_MSI - x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; - x86_msi.teardown_msi_irq = xen_teardown_msi_irq; - x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; + xen_msi_chip.setup_irqs = xen_initdom_setup_msi_irqs; + xen_msi_chip.teardown_irq = xen_teardown_msi_irq; + xen_msi_chip.restore_irqs = xen_initdom_restore_msi_irqs; + x86_msi_chip = &xen_msi_chip; msi_chip.irq_mask = xen_nop_msi_mask; msi_chip.irq_unmask = xen_nop_msi_mask; #endif -- 1.7.1