From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 29 Oct 2014 04:59:50 +0100 (CET) Received: from mail-pd0-f179.google.com ([209.85.192.179]:40907 "EHLO mail-pd0-f179.google.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27011827AbaJ2D7P3qhA1 (ORCPT ); Wed, 29 Oct 2014 04:59:15 +0100 Received: by mail-pd0-f179.google.com with SMTP id g10so2105117pdj.24 for ; Tue, 28 Oct 2014 20:59:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WBO7qX+yOnxby+bFQdWD2boMi/i+WKAsK7GF17RU1UA=; b=rcwKREcnmkkIHLL68poCtq+p68lQZuZ0sy1edjFfRJ8PF3itoU9p5/j6fQVK7gyuEX Zy6xgOS074m0KKXjPJ9I87VhWWeVZj+RTZJ/IK8mAwEIcpN/jALjk87dQ2LxIznoh85E eEy76ZnKbU84EfgYgxc6E2Q3IcW+VdxtHTI5QwcdQx+KYT8g6SkPak1z8vYfPhj1JzVV nMXLLgS05TAS2gybmwnRzoi5fWibBoF1RHvzptfjh89ceGdY4ovDhwFZKOmJd1AKCyPT V47shvTtldcu0//wqG8IfGgtGGNqZWNu3/wHOLfNhAM8MvP13k89pifNINPx3oUsiiTe a0mQ== X-Received: by 10.66.233.37 with SMTP id tt5mr7923551pac.11.1414555149013; Tue, 28 Oct 2014 20:59:09 -0700 (PDT) Received: from localhost (b32.net. [192.81.132.72]) by mx.google.com with ESMTPSA id kj9sm2946249pbc.37.2014.10.28.20.59.07 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 28 Oct 2014 20:59:08 -0700 (PDT) From: Kevin Cernekee To: f.fainelli@gmail.com, tglx@linutronix.de, jason@lakedaemon.net, ralf@linux-mips.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mbizon@freebox.fr, jogo@openwrt.org, linux-mips@linux-mips.org Subject: [PATCH 03/11] irqchip: bcm7120-l2: Eliminate bad IRQ check Date: Tue, 28 Oct 2014 20:58:50 -0700 Message-Id: <1414555138-6500-3-git-send-email-cernekee@gmail.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1414555138-6500-1-git-send-email-cernekee@gmail.com> References: <1414555138-6500-1-git-send-email-cernekee@gmail.com> Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 43673 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: cernekee@gmail.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips This check may be prone to race conditions, e.g. 1) Some external event (e.g. GPIO level) causes an IRQ to become pending 2) Peripheral asserts the L2 IRQ 3) CPU takes an interrupt 4) The event from #1 goes away 5) bcm7120_l2_intc_irq_handle() reads back a 0 status Unlike the hardware supported by brcmstb-l2, the bcm7120-l2 controller does not latch the IRQ status. Bits can change if the inputs to the controller change. Also, do_bad_IRQ() is an ARM-specific macro. So let's just nuke it. Signed-off-by: Kevin Cernekee --- drivers/irqchip/irq-bcm7120-l2.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c index b9f4fb8..49d8f3d 100644 --- a/drivers/irqchip/irq-bcm7120-l2.c +++ b/drivers/irqchip/irq-bcm7120-l2.c @@ -27,8 +27,6 @@ #include "irqchip.h" -#include - /* Register offset in the L2 interrupt controller */ #define IRQEN 0x00 #define IRQSTAT 0x04 @@ -51,19 +49,12 @@ static void bcm7120_l2_intc_irq_handle(unsigned int irq, struct irq_desc *desc) chained_irq_enter(chip, desc); status = __raw_readl(b->base + IRQSTAT); - - if (status == 0) { - do_bad_IRQ(irq, desc); - goto out; - } - do { irq = ffs(status) - 1; status &= ~(1 << irq); generic_handle_irq(irq_find_mapping(b->domain, irq)); } while (status); -out: chained_irq_exit(chip, desc); } -- 2.1.1