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Message-ID: <18c7a2891d8a192f4a88b10d403baeaa8b31797e.camel@xry111.site>
Subject: Re: [PATCH v2 6/7] MIPS: Fallback CPU -march CFLAG to ISA level if
 unsupported
From:   Xi Ruoyao <xry111@xry111.site>
To:     Nick Desaulniers <ndesaulniers@google.com>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc:     "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
        llvm@lists.linux.dev, Nathan Chancellor <nathan@kernel.org>,
        Huacai Chen <chenhuacai@kernel.org>, kernel@xen0n.name,
        loongarch@lists.linux.dev
Date:   Fri, 21 Apr 2023 02:50:54 +0800
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On Fri, 2023-04-21 at 02:42 +0800, Xi Ruoyao wrote:
> Hi Nick,
>=20
> On Thu, 2023-04-20 at 09:32 -0700, Nick Desaulniers wrote:
> > Separate question to Huacai, Wang, and the loongarch list; I know
> > LLVM
> > landed the Loongarch backend recently; any idea what's the status of
> > building arch=3Dloongarch with LLVM=3D1 (linux kernel)?
>=20
> AFAIK there are some issues not resolved yet:
> https://github.com/ClangBuiltLinux/linux/issues/1787

I must be completely stupid: I didn't see you are the one raised the
ticket :).

--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University