Re: [RFC v2 2/5] dt-bindings: clk: add document for ralink clock driver

[NOGUCHI Hiroshi <drvlabo@gmail.com>]

On 2019/04/26 4:29, Stephen Boyd wrote:
>> +Required properties:
>> + - compatible: must be "ralink,rt2880-clock"
>> + - #clock-cells: must be 1
>> + - ralink,sysctl: a phandle to a ralink syscon register region
>> + - clock-indices: identifying number.
>> +       These must correspond to the bit number in CLKCFG1.
> 
> These look like driver level details that we're putting in the DT so we
> can compress the number space that consumers use. Is that right? If so,
> I don't get it. Can we not use this property?

I understand that the bit numbers in clock gating register are hardware 
resource informations.
Therefore, it is not strange that they are described in DT, I think.


>> +       Clock consumers use one of them as #clock-cells index.
>> + - clock-output-names: array of gating clocks' names
>> + - clocks: array of phandles which points the parent clock
>> +       for gating clocks.
>> +       If gating clock does not need parent clock linkage,
>> +       we bind to dummy clock whose frequency is zero.
>> +
>> +
>> +Example:
>> +
>> +/* dummy parent clock node */
>> +dummy_ck: dummy_ck {
>> +       #clock-cells = <0>;
>> +       compatible = "fixed-clock";
>> +       clock-frequency = <0>;
>> +};
> 
> Would this ever exist in practice? If not, please remove from the
> example so we don't get the wrong idea.

I referred to arch/arm/boot/dts/.
omap24xx-clocks.dtsi : defines dummy_ck
omap2420-clocks.dtsi : refers dummy_ck


In practice, There is no problem in specifying another existing clock,
eg MT7620_CLK_PERIPH which is always active.


>> +
>> +clkctrl: clkctrl {
>> +       compatible = "ralink,rt2880-clock";
>> +       #clock-cells = <1>;
>> +       ralink,sysctl = <&sysc>;
>> +
>> +       clock-indices =
>> +                       <12>,
>> +                       <16>, <17>, <18>, <19>,
>> +                       <20>,
>> +                       <26>;
>> +       clock-output-names =
>> +                       "uart0",
>> +                       "i2c", "i2s", "spi", "uart1",
>> +                       "uart2",
>> +                       "pcie0";
>> +       clocks =
>> +                       <&pll MT7620_CLK_PERIPH>,
>> +                       <&pll MT7620_CLK_PERIPH>, <&pll MT7620_CLK_PCMI2S>, <&pll MT7620_CLK_SYS>, <&pll MT7620_CLK_PERIPH>,
>> +                       <&pll MT7620_CLK_PERIPH>,
>> +                       <&dummy_ck>;
>> +       };
>> +};
>> +
>> +/* consumer which refers "uart0" clock */
>> +uart0: uartlite@c00 {
>> +       compatible = "ns16550a";
>> +       reg = <0xc00 0x100>;
>> +
>> +       clocks = <&clkctrl 12>;
> 
> So 12 matches in indices and then that is really "uart0" clk?
> 
>> +       clock-names = "uart0";
>> +

That is right.
rt2880-clock driver is implemented to let clock cell indices match 
indcies in "clock-indices" property.