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Date: Tue, 21 Aug 2001 08:35:08 +0200
From: Ralf Baechle <ralf@oss.sgi.com>
To: machael thailer <dony.he@huawei.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: questions about eret....
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References: <000701c12529$e1640580$8021690a@huawei.com> <20010815103314.A11966@bacchus.dhis.org> <000b01c1295e$0f2174c0$8021690a@huawei.com> <20010820230755.A11242@dea.linux-mips.net> <001501c129dd$8acebb80$8021690a@huawei.com>
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In-Reply-To: <001501c129dd$8acebb80$8021690a@huawei.com>; from dony.he@huawei.com on Tue, Aug 21, 2001 at 09:06:43AM +0800
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On Tue, Aug 21, 2001 at 09:06:43AM +0800, machael thailer wrote:

> > >     I have a question to ask about eret.
> > >
> > >     In RC4xxx/RC32334, after eret finished, does it automatically enable
> IE
> > > bit of STATUS register?
> >
> > ERET does not influence the state of the IE bit.
> 
> I agree with you, but the RC32334 User manual (14-13 section) say  it does
> and say we must run a "CLI" just before eret to disable IE bit in Status
> register .

That has a different reason.  Eret takes the return address from the
EPC register and if you'd take an exception between restoring that and the
eret you'd loose it's content - crash boom bang.

  Ralf