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Date: Fri, 1 Feb 2002 15:15:13 -0800
From: "H . J . Lu" <hjl@lucon.org>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>,
   Hiroyuki Machida <machida@sm.sony.co.jp>, libc-alpha@sources.redhat.com,
   linux-mips@oss.sgi.com
Subject: Re: PATCH: Fix ll/sc for mips (take 3)
Message-ID: <20020201151513.A15913@lucon.org>
References: <20020131231714.E32690@lucon.org> <Pine.GSO.3.96.1020201124328.26449A-100000@delta.ds2.pg.gda.pl> <20020201102943.A11146@lucon.org> <20020201180126.A23740@nevyn.them.org>
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In-Reply-To: <20020201180126.A23740@nevyn.them.org>; from dan@debian.org on Fri, Feb 01, 2002 at 06:01:26PM -0500
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On Fri, Feb 01, 2002 at 06:01:26PM -0500, Daniel Jacobowitz wrote:
> On Fri, Feb 01, 2002 at 10:29:43AM -0800, H . J . Lu wrote:
> > On Fri, Feb 01, 2002 at 12:45:02PM +0100, Maciej W. Rozycki wrote:
> > > On Thu, 31 Jan 2002, H . J . Lu wrote:
> > > 
> > > > > Gas will fill delay slots. Same object codes will be produced, so I
> > > > > think you don't have to do that by hand. 
> > > > 
> > > > It will make the code more readable. We don't have to guess what
> > > > the assembler will do. 
> > > 
> > >  But you lose a chance for something useful being reordered to the slot.
> > > That might not necessarily be a "nop".  Please don't forget of indents
> > > anyway.
> > > 
> > 
> > Here is a new patch. I use branch likely to get rid of nops. Please
> > tell me which indents I may have missed.
> 
> Can you really assume presence of the branch-likely instruction?  I
> don't think so.

Why not? Can you show me a MIPS II or above CPU which doesn't have
branch-likely instruction? From gcc,

/* ISA has branch likely instructions (eg. mips2).  */
/* Disable branchlikely for tx39 until compare rewrite.  They haven't
   been generated up to this point.  */
#define ISA_HAS_BRANCHLIKELY    (mips_isa != 1                          \
                                 /* || TARGET_MIPS3900 */)                      

Did I miss something?


H.J.