From: Ralf Baechle <ralf@linux-mips.org>
To: Kip Walker <kwalker@broadcom.com>
Cc: linux-mips@linux-mips.org
Subject: Re: break_cow and cache flushing
Date: Thu, 17 Oct 2002 04:09:56 +0200 [thread overview]
Message-ID: <20021017040956.B26285@linux-mips.org> (raw)
In-Reply-To: <3DADFC0B.81C8C058@broadcom.com>; from kwalker@broadcom.com on Wed, Oct 16, 2002 at 04:53:47PM -0700
On Wed, Oct 16, 2002 at 04:53:47PM -0700, Kip Walker wrote:
To add a few technical details ...
> 1) 'flush_cache_page' seems to be intended for flushing virtually
> indexed dcaches when a virtual->physical mapping changes (based on
> PAddr)
Yes.
> 2) 'flush_page_to_ram' is also related to avoiding virtual aliasing in
> the dcache (based on VAddr)
Yes again.
Note that flush_page_to_ram is deprecated and should be implement as empty
function for all architecture and the other flushing mechanisms be used
instead.
> 3) 'flush_icache_page' seems to be intended for making the icache
> coherent with the dcache after an executable page has been filled
Yes.
> 4) 'break_cow' may copy an executable page that is marked executable,
> for example a stack page (which has VM_EXEC) and might contain a live
> signal trampoline
Yes.
> On a CPU with writeback physically indexed/tagged dcache and virtually
> indexed icache that isn't coherent with the dcache, (1) and (2) are NOPs
> and (3) must writeback the dcache and flush the icache.
Yes, where this is getting complicated by some CPUs where remote i-caches
are coherent but the local isn't.
Ralf
next prev parent reply other threads:[~2002-10-17 2:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-10-16 23:53 break_cow and cache flushing Kip Walker
2002-10-17 2:04 ` Ralf Baechle
2002-10-17 2:09 ` Ralf Baechle [this message]
2002-10-17 2:49 ` Nigel Weeks
2002-10-17 2:49 ` Nigel Weeks
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