From: Ralf Baechle <ralf@linux-mips.org>
To: "Krishnakumar. R" <krishnakumar@naturesoft.net>
Cc: linux-mips@linux-mips.org
Subject: Re: Single stepping in mips
Date: Wed, 4 Jun 2003 07:18:18 +0200 [thread overview]
Message-ID: <20030604051818.GA2365@linux-mips.org> (raw)
In-Reply-To: <200306040918.01943.krishnakumar@naturesoft.net>
On Wed, Jun 04, 2003 at 09:18:01AM +0530, Krishnakumar. R wrote:
> How can we single step through an instruction
> in mips architecture.
>
> In intel 386 architecture if we set TF flag
> of the EFLAGS register a trap will be generated
> after every instruction. Is there a way in
> mips to do the same.
On most MIPS processors there is no singlestepping feature. You have to
manual insert a breakpoint into the instruction stream and deal with the
exception.
Ralf
next prev parent reply other threads:[~2003-06-04 5:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-06-04 3:48 Single stepping in mips Krishnakumar. R
2003-06-04 5:18 ` Ralf Baechle [this message]
2003-06-04 5:37 ` Krishnakumar. R
2003-06-04 5:53 ` Ralf Baechle
2003-06-04 14:16 ` Maciej W. Rozycki
2003-06-04 14:25 ` Daniel Jacobowitz
2003-06-04 14:32 ` Ralf Baechle
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