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From: "ashish  anand" <ashish_ibm@rediffmail.com>
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To: linux-mips@linux-mips.org
Subject: is cp0 interrupt infrastructure sufficient..?
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<P>=0AI have a generic question regarding interrupt controler functionality=
 <BR>=0Aintegrated in CP0 on mips architecture.<BR>=0AI don't see any inter=
face to configure the edge/level triggering settings.<BR>=0A<BR>=0Athough i=
n our BSP we take care of handling spurious interrupts , but is<BR>=0Athis =
designed to be like that..?<BR>=0A<BR>=0AI mean to ask , suppose I want to =
add a edge triggering peripheral <BR>=0A, to the extent of my understanding=
 this will certainly generate the<BR>=0Aspurious interrupts when coupled wi=
th a level triggering configuration <BR>=0Ain CP0 (by default..?).<BR>=0A<B=
R>=0Aif i am handling through CP0_CAUSE or any other register inspection<BR=
>=0Athat can work but I am loosing so many valid interupts which would have=
 been really valid with edge trigger pin of interrupt controller&nbsp; .<BR=
>=0Afurther this type of handling is valid for actual spurious interrupts <=
BR>=0Anot for those who are certain to be fired because of edge/level misma=
tching.<BR>=0A<BR>=0ABest Regards,<BR>=0AAshish Anand<BR>=0A<BR>=0A<BR>=0A<=
BR>=0A<BR>=0A=0A</P>=0A<br><br>=0A<A target=3D"_blank" HREF=3D"http://clien=
ts.rediff.com/signature/track_sig.asp"><IMG SRC=3D"http://ads.rediff.com/Re=
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I have a generic question regarding interrupt controler functionality =0Ain=
tegrated in CP0 on mips architecture.=0AI don't see any interface to config=
ure the edge/level triggering settings.=0A=0Athough in our BSP we take care=
 of handling spurious interrupts , but is=0Athis designed to be like that..=
?=0A=0AI mean to ask , suppose I want to add a edge triggering peripheral =
=0A, to the extent of my understanding this will certainly generate the=0As=
purious interrupts when coupled with a level triggering configuration =0Ain=
 CP0 (by default..?).=0A=0Aif i am handling through CP0_CAUSE or any other =
register inspection=0Athat can work but I am loosing so many valid interupt=
s which would have been really valid with edge trigger pin of interrupt con=
troller  .=0Afurther this type of handling is valid for actual spurious int=
errupts =0Anot for those who are certain to be fired because of edge/level =
mismatching.=0A=0ABest Regards,=0AAshish Anand=0A=0A=0A=0A=0A
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