From: Ralf Baechle <ralf@linux-mips.org>
To: Matthew Dharm <mdharm@momenco.com>
Cc: podstavin@dev.rtsoft.ru, "'Pavel Kiryukhin'" <savl@dev.rtsoft.ru>,
linux-mips@linux-mips.org
Subject: Re: Marvell MV64340 documentation
Date: Wed, 28 Jan 2004 14:57:32 +0100 [thread overview]
Message-ID: <20040128135732.GA1717@linux-mips.org> (raw)
In-Reply-To: <000d01c3e50d$4a6e8b40$7200a8c0@internal.momenco.com>
On Tue, Jan 27, 2004 at 11:39:34AM -0800, Matthew Dharm wrote:
> > Could you write me what do bits mean in the interrupt cause
> > registers for MV64340 Ethernet? I need to handle them in the
> > interrupt handler for the Gigabit Ethernet in the driver.
> I can't really answer something that specific without violating the NDA.
The quality of support in free software tends to be proportional to the
availability of documentation. Their score definately isn't Marvellous
here ;-)
Ralf
next prev parent reply other threads:[~2004-01-28 13:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-01-27 18:44 Marvell MV64340 documentation Sergey Podstavin
2004-01-27 19:39 ` Matthew Dharm
2004-01-27 19:39 ` Matthew Dharm
2004-01-27 19:44 ` Sergey Podstavin
2004-01-28 13:57 ` Ralf Baechle [this message]
-- strict thread matches above, loose matches on Subject: below --
2004-01-27 12:49 Clock interrupt simulation on sde-gdb navin
2004-01-27 13:47 ` Chris Dearman
2004-01-27 14:45 ` Marvell MV64340 documentation Pavel Kiryukhin
2004-01-27 15:25 ` Ralf Baechle
2004-01-27 18:12 ` Matthew Dharm
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