From: Ralf Baechle <ralf@linux-mips.org>
To: Pavel Kiryukhin <savl@dev.rtsoft.ru>
Cc: linux-mips@linux-mips.org
Subject: Re: i/o and memory space enable bits in PCI-PCI bridge
Date: Tue, 7 Dec 2004 21:54:17 +0100 [thread overview]
Message-ID: <20041207205417.GC13264@linux-mips.org> (raw)
In-Reply-To: <41B608FD.7070209@dev.rtsoft.ru>
On Tue, Dec 07, 2004 at 10:48:13PM +0300, Pavel Kiryukhin wrote:
> Can somebody give me a hint: - what part of 2.6 (mips) code is
> responsible for setting i/o and memory space enable bits in PCI-PCI
> bridge config. space command register?
> On my board those bits are not set after bridge is configured.
> Currently I'm using the following change in "pcibios_enable_resources"
> to work with devices behind the bridge.
> --- arch/mips/pci/pci.c_org 2004-12-06 18:20:50.000000000 +0300
> +++ arch/mips/pci/pci.c 2004-12-06 18:21:22.000000000 +0300
> @@ -164,7 +164,7 @@
>
> pci_read_config_word(dev, PCI_COMMAND, &cmd);
> old_cmd = cmd;
> - for(idx=0; idx<6; idx++) {
> + for(idx=0; idx<=PCI_BRIDGE_RESOURCES; idx++) {
> /* Only set up the requested stuff */
> if (!(mask & (1<<idx)))
> continue;
>
> but I think there should be some legal way I missed.
We had a discussion a while ago where somebody did suggest an afair
identical patch a while ago. The problem with this patch is it fixes
things for a few platforms and breaks things for a few others.
Ralf
prev parent reply other threads:[~2004-12-07 20:54 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-12-07 19:48 i/o and memory space enable bits in PCI-PCI bridge Pavel Kiryukhin
2004-12-07 20:54 ` Ralf Baechle [this message]
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