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Date:	Mon, 21 Aug 2006 21:39:29 +0100
From:	Ralf Baechle <ralf@linux-mips.org>
To:	Thiemo Seufer <ths@networkno.de>
Cc:	Geert Uytterhoeven <geert@linux-m68k.org>,
	"Maciej W. Rozycki" <macro@linux-mips.org>,
	Atsushi Nemoto <anemo@mba.ocn.ne.jp>,
	Linux/MIPS Development <linux-mips@linux-mips.org>
Subject: Re: [PATCH] qemu does not have dcache aliases
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References: <20060820.003338.25478178.anemo@mba.ocn.ne.jp> <Pine.LNX.4.64N.0608211340120.17504@blysk.ds.pg.gda.pl> <20060821.225910.108307053.anemo@mba.ocn.ne.jp> <Pine.LNX.4.64N.0608211612090.17504@blysk.ds.pg.gda.pl> <20060821152657.GB19600@linux-mips.org> <20060821153616.GC20395@networkno.de> <Pine.LNX.4.62.0608211741580.6328@pademelon.sonytel.be> <20060821181216.GD20395@networkno.de>
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On Mon, Aug 21, 2006 at 07:12:16PM +0100, Thiemo Seufer wrote:

> > It depends. If you just want to run MIPS Linux, yes.
> > If you want to debug the kernel on a MIPS core with cache aliasing[*], no.
> 
> I wrote about qemu upstream's priorities.

Considering that maybe we just change Qemu's c0_config to pretend it
emulates a cacheless CPU - which matches what it actually does.  We can
still change that once upstream priorities and Qemu's actual capabilities
have changed.

  Ralf