From: Ralf Baechle <ralf@linux-mips.org>
To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Atsushi Nemoto <anemo@mba.ocn.ne.jp>, linux-mips@linux-mips.org
Subject: Re: [PATCH] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Date: Wed, 22 Nov 2006 12:05:52 +0000 [thread overview]
Message-ID: <20061122120552.GA27782@linux-mips.org> (raw)
In-Reply-To: <45631BD2.4090509@ru.mvista.com>
On Tue, Nov 21, 2006 at 06:31:30PM +0300, Sergei Shtylyov wrote:
> >@@ -104,6 +105,7 @@ static struct irq_chip mips_mt_cpu_irq_c
> > .mask = mask_mips_mt_irq,
> > .mask_ack = mips_mt_cpu_irq_ack,
> > .unmask = unmask_mips_mt_irq,
> >+ .eoi = unmask_mips_mt_irq,
> > .end = mips_mt_cpu_irq_end,
> > };
> >
> >@@ -124,7 +126,8 @@ void __init mips_cpu_irq_init(int irq_ba
> > set_irq_chip(i, &mips_mt_cpu_irq_controller);
> >
> > for (i = irq_base + 2; i < irq_base + 8; i++)
> >- set_irq_chip(i, &mips_cpu_irq_controller);
> >+ set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
> >+ handle_level_irq);
>
> BTW, isn't IRQ7 per-CPU?
Yes and no. On many CPUs IRQ 7 can be configured at reset time as either
the count / compare interrupt or a CPU interrupt just like the others.
It always used to be a normal CPU interrupt for R2000 class CPUs.
Ralf
next prev parent reply other threads:[~2006-11-22 12:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-13 16:13 [PATCH] use generic_handle_irq, handle_level_irq, handle_percpu_irq Atsushi Nemoto
2006-11-21 15:31 ` Sergei Shtylyov
2006-11-22 12:05 ` Ralf Baechle [this message]
2006-11-23 15:42 ` Sergei Shtylyov
2006-11-23 16:17 ` Atsushi Nemoto
2006-11-22 13:19 ` Atsushi Nemoto
2006-12-01 15:08 ` Atsushi Nemoto
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