From: Ralf Baechle <ralf@linux-mips.org>
To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: linux-mips@linux-mips.org
Subject: Re: diffs between lmo and mainline
Date: Thu, 5 Jul 2007 15:28:58 +0100 [thread overview]
Message-ID: <20070705142858.GB19885@linux-mips.org> (raw)
In-Reply-To: <20070705.223050.65192436.anemo@mba.ocn.ne.jp>
On Thu, Jul 05, 2007 at 10:30:50PM +0900, Atsushi Nemoto wrote:
> commit b0e05a32a745a6e3ec5203f28a6bc044653e411a
> Author: Ralf Baechle <ralf@linux-mips.org>
> Date: Thu Jun 21 00:22:34 2007 +0100
>
> [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
>
> The idle loop goes to sleep using the WAIT instruction if !need_resched().
> This has is suffering from from a race condition that if if just after
> need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
> we've just completed the test so go to sleep anyway. This would be
> trivial to fix by just disabling interrupts during that sequence as in:
>
> local_irq_disable();
> if (!need_resched())
> __asm__("wait");
> local_irq_enable();
>
> but the processor architecture leaves it undefined if a processor calling
> WAIT with interrupts disabled will ever restart its pipeline and indeed
> some processors have made use of the freedom provided by the architecture
> definition. This has been resolved and the Config7.WII bit indicates that
> the use of WAIT is safe on 24K, 24KE and 34K cores. It also is safe on
> 74K EA so enable the use of WAIT with interrupts disabled for all 74K
> cores.
Turned out that the 74K doesn't quite behave as I was hoping for so this
one can't go as it is either.
Ralf
prev parent reply other threads:[~2007-07-05 14:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-07-05 13:30 diffs between lmo and mainline Atsushi Nemoto
2007-07-05 13:41 ` Ralf Baechle
2007-07-05 14:28 ` Ralf Baechle [this message]
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