From: Ralf Baechle <ralf@linux-mips.org>
To: Andrew Sharp <andy.sharp@onstor.com>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH] Add code to determine the L2 cache size on Sibyte 1250/112x processors.
Date: Mon, 3 Dec 2007 19:20:10 +0000 [thread overview]
Message-ID: <20071203192010.GA14818@linux-mips.org> (raw)
In-Reply-To: <20071203175601.GA26533@onstor.com>
On Mon, Dec 03, 2007 at 09:56:11AM -0800, Andrew Sharp wrote:
> arch/mips/mm/c-sb1.c | 70 ++++++++++++++++++++++++++++++++++
c-sb1.c does no longer exist. The functionality was folded into c-r4k.c
and at the same time alot of insanity aka pass 1 workarounds dropped.
Ralf
next prev parent reply other threads:[~2007-12-03 19:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-03 17:56 [PATCH] Add code to determine the L2 cache size on Sibyte 1250/112x processors Andrew Sharp
2007-12-03 19:20 ` Ralf Baechle [this message]
2007-12-03 19:36 ` Andrew Sharp
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