Re: SiByte 1480 & Branch Likely instructions?

[Ralf Baechle <ralf@linux-mips.org>]

On Fri, Dec 07, 2007 at 01:54:30PM -0800, Kaz Kylheku wrote:

> Not really a kernel-related question. I've discovered that GCC 4.1.1
> (which I'm not using for kernel compiling, but user space) generates
> branch likely instructions by default, even though the documentation
> says that their use is off by default for MIPS32 and MIPS64, because
> they are considered deprecated. They are documented as obsolete for the
> Broadcom chips I am working with.

Microarchitecture guys love to hate branch likely.  But the deprecation is
a dream.  Binary compatibility will always require those instructions to
continue to exist so the genie is out of the bottle and so I feel very
certain to predict that a future MIPS 3 specification will contain branch
likely.

Afair the SB1 core has a full blown implementation of branch likely -
unlike the R10000 for example where implementors were lazy that is the
branch predictor predicts branch likely instructions as always taken.
So on the R10000 branch likely is only good as loop closure instruction
while on SB1 it should actually do a decent job wherever it can be
scheduled apropriately.

> I'm investigating a software anomaly which looks like might be caused by
> failure to annul the delay slot of a branch-likely in the fall-through
> case. 
> 
> In parallel with writing some tests, I thought I would ask whether
> anyone happens know whether or not these instructions are known to
> actually work correctly on the SB1480 silicon (and perhaps any
> additional details, like what revisions, etc)?

I have no indications of the contrary.

  Ralf