From: Ralf Baechle <ralf@linux-mips.org>
To: Jon Dufresne <jon.dufresne@infinitevideocorporation.com>
Cc: linux-mips@linux-mips.org
Subject: Re: Linux mips and DMA
Date: Thu, 10 Jan 2008 13:46:34 +0000 [thread overview]
Message-ID: <20080110134634.GA12060@linux-mips.org> (raw)
In-Reply-To: <1199971818.4344.5.camel@microwave.infinitevideocorporation.com>
On Thu, Jan 10, 2008 at 08:30:16AM -0500, Jon Dufresne wrote:
> > MIPS hardware is different so pci_alloc_consistent is implemented
> > differently. For correct use however this should not matter. Any bugs
> > you may find porting to MIPS were already bugs on x86.
> >
> > (Or in pci_alloc_consistent but I'm optimistic ;-)
>
>
> Is there a chance that my platform does not support coherent DMA
> mappings? Or is this unheard of for a MIPs platform?
Hardware coherency for DMA is the exception for low-end embedded MIPS
systems andgiven the CPU address your's is no exception from that.
If your system was supporting hardware coherency for DMA I/O you would
have obtained a cachable CPU address like:
dma_handle=0x026f0000 size=0x00010000 cpu_addr=0x826f0000
^^^
A 0x8??????? would be in KSEG0 so cachable.
What hardware are you using anyway?
Ralf
next prev parent reply other threads:[~2008-01-10 13:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-01-09 18:57 Linux mips and DMA Jon Dufresne
2008-01-10 11:39 ` Ralf Baechle
2008-01-10 13:30 ` Jon Dufresne
2008-01-10 13:46 ` Ralf Baechle [this message]
2008-01-10 14:12 ` Jon Dufresne
2008-01-10 14:31 ` Ralf Baechle
2008-01-10 15:04 ` Jon Dufresne
2008-01-11 16:08 ` Jon Dufresne
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