From: "M. Warner Losh" <imp@bsdimp.com>
To: ralf@linux-mips.org
Cc: cfriesen@nortel.com, linux-mips@linux-mips.org
Subject: Re: quick question on 64-bit values with 32-bit inline assembly
Date: Mon, 28 Jan 2008 14:26:10 -0700 (MST) [thread overview]
Message-ID: <20080128.142610.1159133450.imp@bsdimp.com> (raw)
In-Reply-To: <20080128211803.GA20434@linux-mips.org>
In message: <20080128211803.GA20434@linux-mips.org>
Ralf Baechle <ralf@linux-mips.org> writes:
: On Mon, Jan 28, 2008 at 02:02:45PM -0700, M. Warner Losh wrote:
:
: > : this specific interaction of ABI and processor architecture then it was
: > : probably found not to implement such a special read because it is messy
: > : in more than one way.
: >
: > When 64-bit operations are enabled, you get all 64-bits. When they
: > aren't, only the lower 32-bits of the counter are provided (with sign
: > extension). So when operating in 32-bit mode, saving the upper 32
: > bits are not necessary (or even possible).
:
: The architecture manual doesn't make a difference between 32-bit and
: 64-bit for rdhwr. My reading is the entire 64-bit would have to be
: transfered.
Hmmm, the manual I have specifically calls out the difference...
Has cavium provided a public version?
Warner
next prev parent reply other threads:[~2008-01-28 21:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-01-21 18:09 quick question on 64-bit values with 32-bit inline assembly Chris Friesen
2008-01-22 17:57 ` Ralf Baechle
2008-01-22 18:02 ` Geert Uytterhoeven
2008-01-22 18:26 ` Ralf Baechle
2008-01-22 18:55 ` Chris Friesen
2008-01-22 20:07 ` Ralf Baechle
2008-01-28 21:02 ` M. Warner Losh
2008-01-28 21:18 ` Ralf Baechle
2008-01-28 21:26 ` M. Warner Losh [this message]
2008-01-29 10:16 ` Maciej W. Rozycki
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